LPC47B272 Datasheet, PDF (147/195 Pages) SMSC Corporation – 100 Pin Enhanced Super I/O Controller with LPC Interface

NAME
WDT_CTRL
Default = 0x00
on VTR POR
FAN1
Default = 0x00
on VTR POR
FAN2
Default = 0x00
on VTR POR
REG OFFSET
(hex)
55
(R/W)
56
(R/W)
57
(R/W)
DESCRIPTION
Watch-dog timer Control
Bit[0] Watch-dog Status Bit, R/W
=1
WD timeout occurred
=0
WD timer counting
Bit[1] Reserved
Bit[2] Force Timeout, W
=1
Forces WD timeout event; this bit is self-clearing
Bit[3] P20 Force Timeout Enable, R/W
=1
Allows rising edge of P20, from the Keyboard
Controller, to force the WD timeout event. A WD timeout
event may still be forced by setting the Force Timeout Bit, bit
2.
=0
P20 activity does not generate the WD timeout
event.
Note: The P20 signal will remain high for a minimum of 1us
and can remain high indefinitely. Therefore, when P20
forced timeouts are enabled, a self-clearing edge-detect
circuit is used to generate a signal which is ORed with the
signal generated by the Force Timeout Bit.
Bit[7:4] Reserved. Set to 0
FAN Register 1
Bit[0] Fan Control
1=FAN1 pin is high
0=bits[6:1] control the duty cycle of the
FAN1 pin.
Bit[6:1] Duty Cycle Control for FAN1
Control the duty cycle of the FAN1 pin
000000 = pin is low
100000 = 50% duty cycle
111111 = pin is high for 63, low for 1
Bit[7] Fan 1 Clock Select
This bit is used with the Fan 1 Clock Source Select and the
Fan 1 Clock Multiplier bits in the Fan Control register
(0x58) to determine the fan speed F_OUT. See “Different
Modes for Fan” table in “Fan Speed Control and
Monitoring” section.
The fan speed may be doubled through bit 2 of Fan
Control Register at 0x58.
FAN Register 2
Bit[0] Fan Control
1=FAN2 pin is high
0=bits[6:1] control the duty cycle of the
FAN2 pin.
Bit[6:1] Duty Cycle Control for FAN2
Control the duty cycle of the FAN2 pin
000000 = pin is low
100000 = 50% duty cycle
111111 = pin is high for 63, low for 1
Bit[7] Fan 2 Clock Select
This bit is used with the Fan 2 Clock Source Select and
the Fan 2 Clock Multiplier bits in the Fan Control register
(0x58) to determine the fan speed F_OUT. See “Different
Modes for Fan” in “Fan Speed Control and Monitoring”
section.
The fan speed may be doubled through bit 3 of Fan
Control Register at 0x58.
SMSC LPC47B27x
- 147 -
DATASHEET
Rev. 04-17-07