AAT2400 Datasheet, PDF (24/32 Pages) Skyworks Solutions Inc. – Sixteen-Channel White LED Driver Solution

DATA SHEET
AAT2400/2401
Sixteen-Channel White LED Driver Solution
with Full LED Current and Timing Control
AAT2400/2401 Input Capacitors
In general, it is good design practice to place a decou-
pling capacitor (input capacitor) between the IN and GND
pins. An input capacitor in the range of 2.2μF to 10μF is
recommended. A larger input capacitor in this application
may be required for stability and transient response.
Multi-layer ceramic (MLC) capacitors provide small size
and adequate capacitance, low parasitic equivalent
series resistance (ESR) and equivalent series inductance
(ESL). MLC capacitors of type X7R or X5R are good to
ensure capacitance stability over the full operating tem-
perature range.
Boost Converter
Output Capacitor Selection
For best performance, a low-ESR aluminum electrolytic
type capacitor is suggested for use with the AAT2400
boost converter output. Other capacitor dielectric types
are compatible and may be used such as Polymer cath-
ode tantalum chip capacitors or low ESR OS-CON (organ-
ic semiconductor) capacitors. The voltage rating for a
selected capacitor should exceed the greatest operating
output voltage for the AAT2400 boost converter. Best
engineering practices would recommend a capacitor volt-
age rating of two times the maximum operating voltage,
although any voltage rating above the maximum operat-
ing output voltage of the boost converter is acceptable.
PCB Layout Guidelines
Boost converter performance can be adversely affected
by poor layout. Possible impact includes high input and
output voltage ripple, poor EMI performance, and
reduced operating efficiency. Every attempt should be
made to optimize the layout in order to minimize para-
sitic PCB effects (stray resistance, capacitance, and
inductance) and EMI coupling from the high frequency
LX node. A suggested PCB layout for the AAT2400 boost
converter is shown in Figures 4 and 7. The following PCB
layout guidelines should be considered:
1. Minimize the distance from Capacitor C1 and C2’s
negative terminals to the PGND pins. This is espe-
cially true with output capacitor C2, which conducts
high di/dt current from the output diode back to the
PGND pins.
2. Minimize the distance between L1 to D1 and switch-
ing pin SW; minimize the size of the PCB area con-
nected to the SW pin.
3. Maintain a ground plane and connect to the IC PGND
pin(s) as well as the PGND connections of CIN and
COUT.
4. Consider additional PCB metal area on D1’s cathode
to maximize heat sinking capability. This may be
necessary when using a diode with a high V_F and/or
thermal resistance.
5. Consider additional PCB exposed area for the
AAT2400 to maximize heat sinking capability. This
may be necessary when using high output voltage
and high current with minimum input voltage appli-
cation. Connect the exposed paddle (bottom of the
die) to PGND or GND. Connect AGND, DGND to
SGND as close as possible to the package and maxi-
mize the heat sinking space for overall.
6. To maximize package thermal dissipation and power
handling capacity of the AAT2400 and AAT2401
TQFN55-36 package, solder the exposed paddle of
the IC onto the thermal landing of the PCB, where
the thermal landing is connected to the ground
plane. If heat is still an issue, multi-layer boards
with dedicated ground planes are recommended.
Also, adding more thermal vias on the thermal land-
ing would help transfer heat to the PCB effectively.
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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
202307A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • August 24, 2012