AAT2522 Datasheet, PDF (14/19 Pages) Skyworks Solutions Inc. – Dual High-Current, Low-Noise, Step-Down Regulator

DATA SHEET
AAT2522
Dual High-Current, Low-Noise, Step-Down Regulator
Given the total losses, the maximum junction tempera-
ture can be derived from the θ_JA for the TDFN34-16
package, which is 50°C/W.
T_J(MAX) = P_TOTAL · θ_JA + T_AMB
Assuming the operating ambient temperature is 85°C
(the worst case), the maximum power dissipation for the
TDFN34-16 package is determined in the following equa-
tion:
P_MAX =
T_J(MAX) - T_AMB
θ_JA
140°C - 85°C
50°C/W ^{= 1.1W}
The power dissipation varies with the duty cycle and the
output current of the converters. Given the maximum
power dissipation of the TDFN34-16 package at 25°C
and 85°C, the relationship between the maximum allow-
able load for each channel and percent duty cycle are
expressed in Figure 1.
Maximum Output Current vs. Duty Cycle
(VIN = 3.6V)
4
85°C
3.5
25°C
3
2.5
2
1.5
1
0.5
0
0 10 20 30 40 50 60 70 80 90 100
Duty Cycle (%)
Figure 1: Maximum Allowable Current for
AAT2522 Step-Down Converters.
As illustrated in Figure 1, the load limitation varies with
the percentage of duty cycle and the operating ambient
temperature. The total maximum load for both channels
running at the same time in an 85°C ambient is about
4A (2A per channel). Therefore, if channel 1 is running
at 1A, the maximum allowable load for channel 2 is no
more than 3A to prevent the thermal shutdown. However,
the maximum allowable load for each channel running at
room temperature can increase up to 3A. In high current
applications, the exposed pad needs to be connected to
a thick power ground plane through vias for thermal dis-
sipation.
Layout Recommendations
The suggested PCB layout for the AAT2522 is shown in
Figures 3 and 4. The following guidelines should be used
to help ensure a proper layout.
1. Place the input capacitor (C_IN) as closely as possible
to VIN and PGND. Split the input supply tray to
separate the two input capacitors in order to prevent
noise coupling between two channels at heavy load.
2. The output capacitor and inductor should be con-
nected as closely as possible. The inductor connec-
tion to the LX pin should be as short as possible.
3. The feedback trace or FB pin should be separated
from any power trace and connected as closely as
possible to the load point. Sensing along a high-
current load trace will degrade DC load regulation.
4. The resistance of the trace from the load return to
PGND should be kept to a minimum. This will help to
minimize any error in DC regulation due to differ-
ences in the potential of the internal signal ground
and the power ground.
5. Connect unused signal pins to ground to avoid
unwanted noise coupling.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
14
202032A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • June 8, 2012