SKY65152-11 Datasheet, PDF (10/14 Pages) Skyworks Solutions Inc. – 2.4-2.5 GHz WLAN Power Amplifier

DATA SHEET • SKY65152-11 POWER AMPLIFIER
Cross Section
Name Thickness (mils) Material
ε_r
L1
1.4
Cu
–
Lam1
12
Rogers 4003-12 3.38
L2 GND
1.4
Cu, 1 oz.
–
Lam2
4
L3 GND
1.4
FR4-4
4.35
Cu, 1 oz.
–
Lam3
12
FR4-12
4.35
L4
1.4
Cu, 1 oz.
–
Figure 18. Evaluation Board Layer Detail Physical Characteristics
Table 5. SKY65152-11 Evaluation Board Bill of Materials
Component
Value
Size
Product #
C1, C2, C6
3300 pF
0603
5404R28-015
C5, C7, C8, C10
8.2 pF
0603
5404R98-010
C11, C15, C16, C17 10 μF
0603
5404R91-005
L2
27 nH
0603
5332R34-030
R1
560 Ω
0603
5424R20-045
R2, R3
180 Ω
0603
5424R20-031
R5
300 Ω
0603
5424R20-036
Manufacturer
Murata
Murata
TDK
Taiyo-Yuden
Rohm
Rohm
Rohm
Manufacturer’s Part #
GRM188R71H332KD01J
GRM1885C1H8R2CZ01D
C3216X5R0J106KT
HK160827NJ-T
MCR03EZHUJ680
MCR03EZHUJ180
MCR03EZHUJ300
Characteristics
X7R, 50 V, ±10%
C0G, 50 V, ±0.25 pF
X5R, 6 V, ±10%
±5%, SRF 2200 MHz
50 V, 0.063 W, ±5%
50 V, 0.063 W, ±5%
50 V, 0.063 W, ±5%
Application Circuit Notes
Center Ground. It is extremely important to sufficiently ground
the bottom ground pad of the device for both thermal and stability
reasons. Multiple small vias are acceptable and will work well
under the device if solder migration is an issue.
GND (pins 1, 2, 8, 10, 17, 19, and 20). Attach all ground pins to
the RF ground plane with the largest diameter and lowest
inductance via that the layout allows. Multiple small vias are
acceptable and will work well under the device if solder migration
is an issue.
PA_ENB (pin 3). Internal PA enable control pin for fast on/off
control (on = +3 V to VCC; off = 0 to 0.5 V).
VC_BIAS (pin 4). The bias supply voltage for stages 1 and 2,
typically set to +5 V.
VREF1 (pin 5). Bias reference voltage for amplifier stage 1. This
signal should be operated over the same voltage range as VCC
with a nominal voltage of +5 V.
VREF2 (pin 6). Bias reference voltage for amplifier stage 2. This
signal should be operated over the same voltage range as VCC
with a nominal voltage of +5 V.
VREF3 (pin 7). Bias reference voltage for amplifier stage 3. This
signal should be operated over the same voltage range as VCC
with a nominal voltage of +5 V.
RF_OUT (pin 9). Amplifier RF output pin (ZO = 50 Ω). The module
includes an onboard internal DC blocking capacitor. All
impedance matching is provided internal to the module.
VCC3 (pin 11). Supply voltage for the output (final) stage collector
bias (typically +5 V). To bypass VCC3, capacitors C10 and C17
(see Figure 15) should be placed in the approximate location
shown on the Evaluation Board, although exact placement is not
critical.
N/C (pin 12). This pin is open and may or may not be connected
to ground.
VCC2 (pin 13). Supply voltage for the second stage collector bias
(typically +5 V). To bypass VCC2, capacitors C8 and C16 (see
Figure 15) should be placed in the approximate location shown on
the Evaluation Board, although exact placement is not critical.
V_DET (pin 14). The output power detector voltage signal. The
detector load and settling time constant are set external to the
device. Inductor L2 and capacitor C7 (see Figure 15) are set to
yield a settling time of < 0.5 μs.
VCC_DET (pin 15). The power detector supply voltage signal.
Resistor R5 and capacitor C5 (see Figure 15) are used for proper
bias and bypassing of this pin. VCC_DET (pin 15) may be
connected to the PA_ENB supply (pin 3). The benefit of this is that
the current draw consumed by the detector will not be wasted
with the device in the off state.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
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October 19, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 200968F