SP707EN-L Datasheet, PDF (9/18 Pages) Sipex Corporation – Low Power Microprocessor Supervisory Circuits

FEATURES
The SP705-708/813L/813M series provides
four key functions:
1. A reset output during power-up, power-down
and brownout conditions.
2. An independent watchdog output that goes
LOW if the watchdog input has not been toggled
within 1.6 seconds.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring a
power supply other than +5V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
The SP707/708 devices are the same as the
SP705/706 devices except for the active-HIGH
RESET substitution of the watchdog timer. The
SP813L is the same as the SP705 except an
active-HIGH RESET is provided rather than an
active-LOW RESET. The SP705/707/813L
devices generate a reset when the supply voltage
drops below 4.65V. The SP706/708/813M
devices generate a reset below 4.40V.
The SP705-708/813L/813M series is ideally
suited for applications in automotive systems,
intelligent instruments, and battery-powered
computers and controllers. The SP705-708/813L/
813M series is ideally applied in environments
where monitoring of power supply to a µP and its
related components is critical.
THEORY OF OPERATION
The SP705-708/813L/813M series is a
microprocessor (µP) supervisory circuit that
monitors the power supplied to digital circuits
such as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that
requires power supply monitoring. Implementing
this series will reduce the number of components
and overall complexity. The watchdog functions
of this product family will continuously oversee
the operational status of a system. The operational
features and benefits of the SP705-708/813L/
813M series are described in more detail below.
RESET Output
A microprocessor's reset input starts the µP
in a known state. The SP705-708/813L/813M
series asserts reset during power-up and
prevents code execution errors during power-
down or brownout conditions.
On power-up, once V_CC reaches 1V, RESET is
a guaranteed logic LOW of 0.4V or less. As V_CC
rises, RESET stays LOW. When V_CC rises
above the reset threshold, an internal timer re-
leases RESET after 200ms. RESET pulses
LOW whenever V_CC dips below the reset thresh-
old, such as in a brownout condition. When a
brownout condition occurs in the middle of a
previously initiated reset pulse, the pulse con-
tinues for at least another 140ms. On power-
down, once V_CC falls below the reset threshold,
RESET stays LOW and is guaranteed to be 0.4V
or less until V_CC drops below 1V.
The SP707/708/813L/813M active-HIGH
RESET output is simply the complement of the
RESET output and is guaranteed to be valid with
V_CC down to 1.1V. Some µPs, such as Intel's
80C51, require an active-HIGH reset pulse.
Watchdog Timer
The SP705/706/813L/813M watchdog circuit
monitors the µP's activity. If the µP does not
toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET
is released and WDI is driven HIGH or LOW,
the timer will start counting. Pulses as short as
50ns can be detected.
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
9
© Copyright 2000 Sipex Corporation