SP26LV432_06 Datasheet, PDF (8/11 Pages) Sipex Corporation – High-Speed, Low-Power Quad RS-422 Differential Line Receiver

The SP26LV432 is a low-power quad differ-
ential line receiver designed for digital data
transmission meeting specifications of the
EIA standard RS-422 protocol. The
SP26LV432 features Sipex's BiCMOS pro-
cess allowing low power operational char-
acteristics of CMOS technology while meet-
ing all of the demands of the RS-422 serial
protocol to at least 50Mbps under load in
harsh environments.
The RS-422 standard is ideal for multi-drop
applications and for long-distance commu-
nication. The RS-422 protocol allows up to
ten receivers to be connected to a data bus,
making it an ideal choice for multi-drop ap-
plications. Since the cabling can be as long
as 4,000 feet, the RS-422 receivers have an
input sensitivity of 200mV over the wide
(-7.0V to +7.0V) common mode range to
accommodate ground potential differences.
Internal pull-up and pull-down
resistors prevent output oscillation on un-
used channels. Because the RS-422 is a
differential interface, data is virtually im-
mune to noise in the transmission line.
THEORY OF OPERATION
The SP26LV432 accepts RS-422 levels and
translates these into TTL or CMOS input
levels. The SP26LV432 features active HIGH
and active LOW receiver enable controls
common to all four receiver channels. A
logic HIGH on the ENABLE pin (pin 4) or a
logic LOW on the ENABLE pin (pin 12) will
enable the differential receiver outputs. A
logic LOW on the ENABLE pin (pin 4) and a
logic HIGH on the ENABLE pin (pin 12) will
force the receiver outputs into high imped-
ance (high-Z). Refer to the truth table in
Figure 20.
The RS-422 line receivers feature high
source and sink current capability. All re-
ceivers are internally protected against short
circuits on their inputs. The receivers fea-
ture tri-state outputs with 6mA source and
sink capability. The typical receiver propa-
gation delay is 14ns (35ns max).
To minimize reflections, the multipoint bus
transmission line should be terminated at
both ends in its characteristic impedance,
and stub lengths off the main line should be
kept as short as possible.
ENABLE ENABLE
Input
Output
LOW
HIGH
don't care
High-Z
HIGH
Don't Care V_ID > V_TH (max)
HIGH
Don't Care V_ID < V_TH (min)
Don't Care LOW
V > V (max)
ID
TH
Don't Care LOW
V_ID < V_TH (min)
HIGH Don't Care
Open
HIGH
LOW
HIGH
LOW
HIGH
Don't Care LOW
Open
HIGH
Figure 20. Truth Table, Enable/Disable Function
Common to all Four RS-422 Receivers
Driver Side such as SP26LV431 Receiver Side such as SP26LV432
ENABLE
DATA
DATA
*RT
OUTPUT
*RT is optional although highly
recommended to reduce reflection.
Figure 21. Two-Wire Balanced Systems, RS-422
Date: 04/27/06
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
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© Copyright 2006 Sipex Corporation