SP6133_06 Datasheet, PDF (6/10 Pages) Sipex Corporation – Evaluation Board Manual

The simple guidelines for positioning the poles and zeros and for calculating the
component values for Type III compensation are as follows:
R1 = 68.1K
R2 = ^{0.8 × R1} (sets output voltage)
Vout − 0.8
1
CZ 3 =
(sets first zero)
1
ZSF × R1×
LC
( ) _{RZ 2 =} (6.28 × fc)² × L × Cout +1 _× Vramp _{(sets the cross-over frequency, fc)}
6.28 × fc × CZ3
Vin
1
CZ 2 =
(sets second zero)
1
ZSF × RZ 2 ×
LC
1
CP1 =
(sets first high-frequency pole)
6.28 × fs × RZ 2
1
RZ 3 =
(sets second high-frequency pole)
6.28 × fs × CZ3
Where ZSF=(f compensation double zero)/(f circuit double pole)
Here ZSF is set at 0.7.
As a particular example, consider for the following SP6133EB, 10A MAX with
component selections for a type III Voltage Loop Compensation:
Vin = 12V
Vout = 3.30V @ 0 to 10A load
Select L = 2.7 uH => 30% current ripple.
Select Cout = 200uF 2x100uF Ceramic capacitors (Resr ≈ 2.5mΩ)
fs = 300KHz SP6133ER1 internal Oscillator Frequency
Vramp_pp = 1.0V SP6133ER1 internal Ramp Peak to Peak Amplitude
Rev 3/30/06
SP6133 Evaluation Manual
Page 6 of 10
Copyright 2006 Sipex Corporation