SP6133_06 Datasheet, PDF (5/10 Pages) Sipex Corporation – Evaluation Board Manual

LOOP COMPENSATION DESIGN
The open loop gain of the SP6133EB can be divided into the gain of the error amplifier
Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback
resistor divider Gfbk. In order to cross over at the selected frequency fc, the gain of the
error amplifier must compensate for the attenuation caused by the rest of the loop at
this frequency. The goal of loop compensation is to manipulate the open loop frequency
response such that its gain crosses over 0dB at a slope of –20dB/dec.
The open loop crossover frequency should be higher than the ESR zero of the output
capacitors but less than 1/5 of the switching frequency fs to insure proper operation.
Since the SP6133EB is designed with ceramic type output capacitors, a Type III
compensation circuit is required to give a phase boost of 180° in order to counteract the
effects of the output LC under damped resonance double pole frequency.
Figure 11. SP6133EB Voltage Mode Control Loop with Loop Dynamic
Rev 3/30/06
SP6133 Evaluation Manual
Page 5 of 10
Copyright 2006 Sipex Corporation