SP200 Datasheet, PDF (6/15 Pages) Sipex Corporation – +5V High-Speed RS-232 Transceivers with 0.1uF Capacitors

V_CC = +5V
+
C_{1 –}
–5V
+5V
+
C_{2 –}
–5V
C₄
+ – _{VDD Storage Capacitor}
– + _{VSS Storage Capacitor}
C₃
Figure 1. Charge Pump — Phase 1
attain symmetrical ±10V power supplies.
Figure 3a shows the waveform found on the
positive side of capcitor C , and Figure 3b
2
shows the negative side of capcitor C₂. There is
a free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V charge storage —During this phase of the
SS
clock cycle, the positive side of capacitors C₁
and C are initially charged to +5V. C ⁺ is then
2
l
switched to ground and the charge in C ^– is
1
transferred to C ^–. Since C ⁺ is connected to
2
2
+5V, the voltage potential across capacitor C₂ is
now 10V.
Phase 2
— V_SS transfer — Phase two of the clock con-
nects the negative terminal of C₂ to the V_SS
storage capacitor and the positive terminal of C₂
to ground, and transfers the generated –l0V to
C₃. Simultaneously, the positive side of capaci-
tor C ₁ is switched to +5V and the negative side
is connected to ground.
Phase 3
— V_DD charge storage — The third phase of the
clock is identical to the first phase — the charge
V_CC = +5V
transferred in C₁ produces –5V in the negative
terminal of C₁, which is applied to the negative
side of capacitor C₂. Since C₂₊ is at +5V, the
voltage potential across C₂ is l0V.
Phase 4
— V_DD transfer — The fourth phase of the clock
connects the negative terminal of C to ground,
2
and transfers the generated l0V across C to C ,
2
4
the V_DD storage capacitor. Again, simultaneously
with this, the positive side of capacitor C₁ is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Since both V⁺ and V^– are separately generated
from V_CC; in a no–load condition V⁺ and V^– will
be symmetrical. Older charge pump approaches
that generate V^– from V⁺ will show a decrease in
the magnitude of V^– compared to V⁺ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
The SP200 Series devices are made up of three
basic circuit blocks — 1) transmitter/driver, 2)
receiver and 3) the Sipex proprietary charge
+
C_{1 –}
+
C_{2 –}
–10V
C₄
+ – _{VDD Storage Capacitor}
– + _{VSS Storage Capacitor}
C₃
Figure 2. Charge Pump — Phase 2
REV: A DATE:12/03/2003
+5V High-Speed RS232 Transceivers
6
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