SP690A Datasheet, PDF (3/16 Pages) Sipex Corporation – Low Power Microprocessor Supervisory with Battery Switch-Over

SPECIFICATIONS (continued)
V_cc=4.75v
to
5.50V
for
SP690A/SP802L/SP805L,
V =4.50V
CC
to
5.50V
for
SP692A/SP802M/SP805M,
V_BATT=2.80V,
T_A=T_MIN
to
T_MAX,
typical
specified
at
25^OC,
unless otherwise noted.
PARAMETERS
MIN.
TYP.
MAX. UNITS CONDITIONS
Reset Threshold Hysteresis
40
mV Peak to Peak
Reset Pulse Width, t_RS
RESET Output Voltage,
NOTE 5
RESET Output Voltage,
NOTE 6
Watchdog Timeout, t_WD
WDI Pulse Width, t_WP
WDI Input Threshold,
V_CC = 5V, NOTE 4
WDI Input Current
140
V_CC - 1.5
0.8
V_CC - 1.5
1.00
50
200
0.1
0.004
0.1
1.60
3.5
50
-150
-50
280
0.4
0.3
0.4
2.25
0.8
150
ms
Volts
Volts
sec
I_SOURCE = 800µA
I_SINK = 3.2mA
I_SINK = 50µA, V_CC = 1.0
I_SOURCE = 4µA, V_CC = 1.0V,
I_SOURCE = 800µA
I_SINK = 3.2mA
ns
Volts
V_IL = 0.4V, V_IH = (0.8)(V_CC)
Logic low
Logic high
µA
WDI =V_CC
WDI = 0V
PFI Input Threshold
1.200
1.225
1.250
1.250
1.300
1.275
SP690A/692A, SP805L/M
Volts
SP802L/M
PFI Input Current
-25
0.01
25
nA
PFO Output Voltage
V_CC - 1.5
0.1
Volts ^{ISOURCE = 800µA}
0.4
I_SINK = 3.2mA
NOTE 1: The input voltage limits on PFI (pin 4) and WDI (pin 6) may be exceeded if the current into
these pins is limited to less than 10 mA.
NOTE 2: Either V_CC or V_BATT can go to 0V if the other is greater than 2.0V.
NOTE 3: "-" equals the battery-charging current, "+" equals the battery-discharging current.
NOTE 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and V_CC
is in the operating voltage range. WDI is internally biased to 35% of V_CC with an input impedance of
50KΩ.
NOTE 5: SP690A, SP692A, SP802L, and SP802M only.
NOTE 6: SP805L and SP805M only.
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
3
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