SP6128A Datasheet, PDF (3/10 Pages) Sipex Corporation – Low Voltage, Synchronous Step Down PWM Controller Ideal for 2A to 10A, Small Footprint, DC-DC Power Converters

ELECTRICAL CHARACTERISTICS
Unless otherwise specified: -40°C < T_A < 85°C, 3.0V < PV_CC = V_CC < 5.5V, C_COMP = 22nF, CGH = CGL = 3.3nF, V_FB = 0.8V,
SWN = GND = 0V, typical value for design guideline only.
PARAMETER
MIN TYP MAX UNITS CONDITIONS
SOFT START, SHUTDOWN, UVLO
Internal Soft Start Slew Rate
0.1 0.3 0.6 V/ms COMP pin, on transition from shutdown
COMP Discharge Current
183
µA COMP = 0.5V, Fault Initiated
COMP Clamp Voltage
0.55 0.65 0.75 V V_FB = 0.9V
COMP Clamp Current
10 30
65
µA COMP = 0.5V, V_FB = 0.9V
Shutdown Threshold Voltage
0.29 0.34 0.39 V Measured at COMP Pin
Shutdown Input Pull-up Current 2
5
10 µA COMP = 0.2V, Measured at COMP pin
V_CC Start Threshold
2.63 2.8 2.95 V
V_CC Stop Threshold
2.47 2.7 2.9
V
GATE DRIVERS
GH Rise Time
GH Fall Time
GL Rise Time
GL Fall Time
GH to GL Non-Overlap Time
GL to GH Non-Overlap Time
60 110 ns PV_CC > 4.5V
60 110 ns PV_CC > 4.5V
60 110 ns PV_CC > 4.5V
60 110 ns PV_CC > 4.5V
0 100 140 ns PV_CC > 4.5V, measured at 2volt threshold
0 100 140 ns PV_CC > 4.5V, measured at 2volt threshold
PIN DESCRIPTION
PIN N0.
1
2
3
4
5
6
7, 8, 9
10
11
12
13
14
PIN NAME
GL
PV_CC
V_CC
PGND
GND
COMP
NC
V_FB
I_SET
SWN
GH
BST
DESCRIPTION
High current driver output for the low side MOSFET switch. It is always low if GH is high.
GL swings from PGND to PV_CC.
Positive input supply for the low side gate driver. It's recommended to tie the PV_CC to the
V_CC pin.
Positive input supply for the logic circuitry. Properly bypass this pin to GND with a low ESL/
ESR ceramic capacitor or RC filter.
Power ground pin.
Signal ground pin.
Output of the Error Amplifier. It is internally connected to the inverting input of the PWM
comparator. A lead-lag network is typically connected to the COMP pin to compensate the
feedback loop in order to optimize the dynamic performance of the voltage mode control
loop. Sleep mode can be invoked by pulling the COMP pin below 0.3V with an external
open-drain or open-collector transistor. An internal 5µA pull-up ensures start-up.
No connect.
Feedback Voltage Pin. It is the inverting input of the Error Amplifier and serves as the
output voltage feedback point for the Buck converter. The output voltage is sensed and
can be adjusted through an external resistor divider.
Overcurrent program pin. A resistor programs the overcurrent threshold. The overcurrent
comparator sets the fault latch and terminates gate pulses when VI_SET > V_SWN and the high
side MOSFET is turned on. This prevents excessive power dissipation in the external
power MOSFETs during an overload condition. An internal delay circuit prevents false
shutdowns that might otherwise occur during very short, mild overload conditions,due to
load transients.
Lower supply rail for the GH high-side gate driver. It also connects to the Current Limit
comparator. Connect this pin to the switching node at the junction between the two
external power MOSFET transistors. This pin monitors the voltage drop across the R_DS(ON)
of the high side N-channel MOSFET while it is conducting.
High current driver output for the high side MOSFET switch. It is always low if GL is high or
during a fault. GH swings from SWN to BST.
High side driver supply pin. Connect BST to the external boost diode and capacitor as
shown in the application schematic on page 1.
Rev. 05/25/04
SP6128A Low Voltage, Synchronous Step Down PWM Controller
3
© Copyright 2004 Sipex Corporation