SP43701 Datasheet, PDF (7/12 Pages) SIPAT Co,Ltd – 50 Ω RF Digital Attenuator

SP43701
Product Specification
Table 5. Control Voltage
State
Low
Bias Condition
0 to +1.0 Vdc at 2 µA (typ)
High
+2.6 to +5 Vdc at 10 µA (typ)
Table 6. Latch and Clock Specifications
Latch Enable Shift Clock
Function
0
↑
Shift Register Clocked
↑
X
Contents of shift register
transferred to attenuator core
Table 7. Parallel Truth Table
Parallel Control Setting
D6 D5 D4 D3 D2 D1 D0
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
L
H
H
H
H
H
H
H
Attenuation
Setting
RF1-RF2
Reference I.L.
0.25 dB
0.5 dB
1 dB
2 dB
4 dB
8 dB
16 dB
31.75 dB
Table 8. Address Word Truth Table
Address Word
A7
(MSB)
A6
A5
A4
A3
A2
A1
A0
X
X
X
X
X
L
L
L
X
XXXXL
L
H
X
XXXXLH
L
X
X
X
X
X
L
H
H
X
XXXXHL
L
X
XXXXHL
H
X
X X X X HH
L
X
X
X
X
X
HH
H
Address
Setting
000
001
010
011
100
101
110
111
Table 9. Attenuation Word Truth Table
Attenuation Word
Attenuation
D7
D6
D5
D4
D3
D2
D1
D0
(LSB)
Setting
RF1-RF2
X
L
L
L
L
L
L
L Reference I.L.
XL
L
L
L
L
L
H
0.25 dB
XL
L
L
L
L
H
L
0.5 dB
X
L
L
L
L
H
L
L
1 dB
X
L
L
L
H
L
L
L
2 dB
X
L
L
H
L
L
L
L
4 dB
X
L
H
L
L
L
L
L
8 dB
XH
L
L
L
L
L
L
XHHHHHH
H
16 dB
31.75 dB
Table 10. Serial-Addressable Register Map
MSB (last in)
Bits can either be set to logic high or logic low
Q15 Q14 Q13 Q12 Q11 Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
Address Word
Attenuation Word
LSB (first in)
Q1
Q0
D1
D0
Attenuation Word is derived directly from the attenuation value. For example, to program the 18.25 dB state
at address 3:
Address word: XXXXX011
Attenuation Word: Multiply by 4 and convert to binary → 4 * 18.25 dB → 73 → X1001001
Serial Input: XXXXX011X1001001
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