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SP43602 Datasheet, PDF (5/10 Pages) SIPAT Co,Ltd – 50 Ω RF Digital Attenuator
SP43602
50 Ω RF Digital Attenuator
Table 5. Control Voltage
State
Low
Bias Condition
0 to +1.0 Vdc at 2 µA (typ)
High
+2.6 to +5 Vdc at 10 µA (typ)
Table 6. Latch and Clock Specifications
Latch Enable
X
↑
Shift Clock
↑
X
Function
Shift Register Clocked
Contents of shift register transferred
to attenuator core
Table 7. Parallel Truth Table
Parallel Control Setting
D6
D5
D4
D3
D2
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
H
H
H
H
H
Attenuation Setting
D1
RF1-RF2
L
Reference I.L.
H
0.5 dB
L
1 dB
L
2 dB
L
4 dB
L
8 dB
L
16 dB
H
31.5 dB
Table 8. Serial Attenuation Word Truth Table
Attenuation Word
Attenuation
D7
D6
D5
D4
D3
D2
D1
D0
(LSB)
Setting
RF1-RF2
L
L
L
L
L
L
L
L Reference I.L.
L
L
L
L
L
L
H
L
0.5 dB
L
L
L
L
L
H
L
L
1 dB
L
L
L
L
H
L
L
L
2 dB
L
L
L
H
L
L
L
L
4 dB
L
L
H
L
L
L
L
L
8 dB
L
H
L
L
L
L
L
L
16 dB
LHHHHHH
L
31.5 dB
Table 9. Serial Register Map
MSB (last in)
Q7
Q6
Q5
Q4
Q3
Q2
D7
D6
D5
D4
D3
D2
Attenuation Word
LSB (first in)
Q1
Q0
D1
D0
Bits must be set to logic low
Attenuation Word is derived directly from the attenuation value. For example, to program the 12.5 dB state:
Attenuation Word: Multiply by 4 and convert to binary → 4 * 12.5 dB → 50 → 00110010
Serial Input: 00110010
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