U632H64 Datasheet, PDF (8/15 Pages) List of Unclassifed Manufacturers – PowerStore 8K x 8 nvSRAM

U632H64
PowerStore and automatic Power Up RECALL
V_CAP
5.0 V
V_SWITCH
PowerStore
Power Up
RECALL
W
DQi
(24)
t_RESTORE
t_PDSTOREp
t
(24)
t_RESTORE
t_DELAYp
Hardware Controlled STORE
POWER UP ^{BROWN OUT}
BROWN OUT
RECALL ^{NO STORE}
PowerStore
(NO S RAM WRITES)
HSB
DQi
Output
t_{w(H)Sq (28)}
t_{dis(H)S (26)}
Previous Data Valid
t_{d(H)S (25)}
t_{en(H)S (27)}
High Impedance
Data Valid
No.
Software Controlled STORE/
RECALL Cycle
Symbol
Alt.
IEC
Unit
Min. Max.
29 STORE/RECALL Initiation Time
30 Chip Enable to Output Inactive^s
31 STORE Cycle Time
32 RECALL Cycle Time^r
33 Address Setup to Chip Enable
34 Chip Enable Pulse Width^{s, t}
35 Chip Disable to Address Change
t_AVAV
t_ELQZ
t_ELQXS
t_ELQXR
t_AVELN
t_ELEHN
t_EHAXN
t_cR
t_dis(E)SR
t_d(E)S
t_d(E)R
t_su(A)SR
t_w(E)SR
t_h(A)SR
25
ns
600 ns
10 ms
20 μs
0
ns
20
ns
0
ns
p: t_PDSTORE approximate t_d(E)S or t_d(H)S; t_DELAY approximate t_dis(H)S.
q: After t_w(H)S HSB is hold down internal by STORE operation.
r: An automatic RECALL also takes place at power up, starting when V_CC exceeds V_SWITCH and takes t_RESTORE. V_CC must not drop below
V_SWITCH once it has been exceeded for the RECALL to function properly.
s: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
t: Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
STK Control #ML0047
8
Rev 1.1
August 15, 2006