U631H16 Datasheet, PDF (8/13 Pages) List of Unclassifed Manufacturers – SOFTSTORE 2K X 8 NVSRAM

U631H16
Symbol
No. Software Controlled STORE/RECALL
Cycle^{l, n}
Alt.
IEC
25
35
45
Unit
Min. Max. Min. Max. Min. Max.
25 STORE/RECALL Initiation Time
26 Chip Enable to Output Inactive^o
27 STORE Cycle Time^p
28 RECALL Cycle Time^q
29 Address Setup to Chip Enable^r
30 Chip Enable Pulse Width^{r, s}
31 Chip Disable to Address Change^r
t_AVAV
t_cR
25
35
45
ns
t_ELQZ t_dis(E)SR
600
600
600 ns
t_ELQXS t_d(E)S
10
10
10 ms
t_ELQXR t_d(E)R
20
20
20 μs
t_AVELN t_su(A)SR 0
0
0
ns
t_ELEHN t_w(E)SR 20
25
35
ns
t_EHAXN t_h(A)SR 0
0
0
ns
n: The software sequence is clocked with E controlled READs.
o: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
p: Note that STORE cycles (but not RECALL) are aborted by V_CC < V_SWITCH (STORE inhibit).
q: An automatic RECALL also takes place at power up, starting when V_CC exceeds V_SWITCH and takes t_RESTORE. V_CC must not drop below
V_SWITCH once it has been exceeded for the RECALL to function properly.
r: Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
s: If the Chip Enable Pulse Width is less than t_a(E) (see Read Cycle) but greater than or equal t_w(E)SR, than the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
Software Controlled STORE/RECALL Cycle^{r, s, t, u} (E = HIGH after STORE initiation)
Ai
E
DQi
Output
t_cR (25)
ADDRESS 1
t_w(E)SR
(30)
t_{su(A)SR (29)}
(31)
t_h(A)SR
High Impedance _VALID
t_{cR (25)}
ADDRESS 6
(29)
t_su(A)SR
t_w(E)SR
(30)
(31) th(A)SR
t_dis(E) (5)
t_{d(E)S (27)}
t_{d(E)R (28)}
VALID
t_{dis(E)SR (26)}
Software Controlled STORE/RECALL Cycle^{r, s, t, u} (E = LOW after STORE initiation)
Ai
E
DQi
Output
t_cR (25)
ADDRESS 1
t_w(E)SR
(29) ⁽³⁰⁾ (31)
t_su(A)SR
High Impedance
t_h(A)SR
VALID
ADDRESS 6
(31) ^th(A)SR
(29)
t_su(A)SR
t_{d(E)S (27)} t_{d(E)R (28)}
VALID
t_{dis(E)SR (26)}
t: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW
throughout. Addresses 1 through 6 are found in the mode selection table. Address 6 determines whether the U631H16 performs a STORE
or RECALL.
u: E must be used to clock in the address sequence for the Software controlled STORE and RECALL cycles.
STK Control #ML0042
8
Rev 1.0
March 31, 2006