STK14D88 Datasheet, PDF (2/19 Pages) List of Unclassifed Manufacturers – 32K x 8 AutoStore nvSRAM CMOS Nonvolatile Static RAM

STK14D88
V_CAP 1
48
2
47
A_{14 3}
46
A_{12 4}
45
A₇ 5
44
A₆ 6
43
A₅ 7
42
8
41
A₄ 9
40
10
39
11
38
12
37
V_SS 13
36
14
35
15
34
DQ₀ ¹⁶
33
A₃ 17
32
A₂ 18
31
A₁ 19
30
A₀ 20
29
DQ₁ 21
28
DQ₂ 22
27
23
26
24
25
48 Pin SSOP
V_CC
HSB
W
A₁₃
A₈
A₉
A₁₁
V_SS
DQ₆
G
A₁₀
E
DQ₇
DQ₅
DQ₄
DQ₃
V_CC
V_CAP
A₁₄
A₁₂
A₇
A₆
A₅
A₄
A₃
A₂
A₁
A₀
DQ₀
DQ₁
DQ₂
V_SS
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
32 Pin SOIC
V_CC
HSB
W
A₁₃
A₈
A₉
A₁₁
G
A₁₀
E
DQ₇
DQ₆
DQ₅
DQ₄
DQ₃
Relative PCB area usage.
See website for detailed package
size specifications.
PIN DESCRIPTIONS
Pin Name
I/O
A₁₄-A₀
DQ₇-DQ₀
E
Input
I/O
Input
W
Input
G
Input
V_CC
HSB
Power Supply
I/O
V_CAP
V_SS
(Blank)
Power Supply
Power Supply
No Connect
Document Control #ML0033 Rev 1.7
February 2007
Description
Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array
Data: Bi-directional 8-bit data bus for accessing the nvSRAM
Chip Enable: The active low E input selects the device
Write Enable: The active low W enables data on the DQ pins to be written to the address
location latched by the falling edge of E
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tri-state.
Power: 3.0V, +20%, -10%
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled
low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor
keeps this pin high if not connected. (Connection Optional).
Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from
SRAM to nonvolatile storage elements.
Ground
Unlabeled pins have no internal connections.
2