SII3531A Datasheet, PDF (11/81 Pages) Silicon image – PCI Express to Serial ATA Controller

Silicon Image, Inc.
PCI Express to Serial ATA Controller
Data Sheet
2.2 SATA Interface Timing Specifications
Symbol
T_{TX_RISE_FALL}
T_{TX_TOL_FREQ}
Parameter
Rise and Fall time at
transmitter
Tx Frequency Long Term
Stability
Condition
20%-80% at Gen 1
20%-80% at Gen 2
Limits
Min
Typ
Max
Unit
100
67
273
136
ps
-350
+350
ppm
Table 2-5 SATA Interface Timing Specifications
2.3 SATA Interface Transmitter Output Jitter Characteristics
Symbol
TJ_{5UI_15G}
DJ_{5UI_15G}
TJ_{250UI_15G}
DJ_{250UI_15G}
Parameter
Total Jitter, Data-Data 5UI
Deterministic Jitter, Data-
Data 5UI
Total Jitter, Data-Data
250UI
Deterministic Jitter, Data-
Data 250UI
Condition
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Measured at Tx output pins
peak to peak phase variation
Random data pattern
Limits
Min
Typ
80
50
85
55
Table 2-6 SATA Interface Transmitter Output Jitter Characteristics, 1.5 Gb/s
Symbol
Parameter
TJ_{fBAND/10_3G} Total Jitter, f_C3dB=f_BAUD/10
DJ_{fBAND/10_3G}
Deterministic Jitter,
f_C3dB=f_BAUD/10
TJ_{fBAND/500_3G} Total Jitter, f_C3dB=f_BAUD/500
DJ_{fBAND/500_3G}
Deterministic Jitter,
f_C3dB=f_BAUD/500
Condition
Measured at SATA Compliance
Point
clock pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
clock pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
Limits
Min
Typ
70*
45*
80
55
Table 2-7 SATA Interface Transmitter Output Jitter Characteristics, 3 Gb/s
Max
Max
Unit
ps
ps
ps
ps
Unit
ps
ps
ps
ps
* With f_C3dB=f_BAUD/10 bandwidth, jitter analysis algorithm provided by oscilloscope manufacture requires full transition density
which is clock pattern. A series resistor of 75ohms should be populated close to the VDDX pin
© 2006 Silicon Image, Inc.
11
SiI-DS-0208-C