SC92031 Datasheet, PDF (18/38 Pages) Silan Microelectronics Joint-stock – 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER

SC92031
False Carrier Sense Counter (Offset 11, R)
This counter provides information required to implement the “FalseCarriers”attribute within the MAU managed
object class of Clause 30 of IEEE 802.3u specification.
Bit R/W
Name
15ˉ0 R FCSCNT
Description/Usage
This 16-bit counter increments by 1 for each false carrier event. It is
cleared to zero by read command.
Nway Test Register (Offset 13, R/W)
Bit R/W
Name
Description/Usage
15-8
-
--
Reserved
7
R/W NWLPBK
1 = set Nway to loopback mode.
6-4
-
--
Reserved
3
R/W ENNWLE
1 = LED0 Pin indicates link pulse
2
R FLAGABD
1 = Auto-neg experienced ability detect state
1
R FLAGPDF
1=Auto-neg experienced parallel detection fault state
0
R FLAGLSC
1 = Auto-neg experienced link status check state
RX_ER Counter (Offset 14, R)
Bit R/W
Name
15ˉ0 R RXERCNT
Description/Usage
This 16-bit counter increments by 1 for each valid packet received. It is
cleared to zero by read command.
CS Configuration Register (Offset 15, R/W)
Bit R/W
Name
Description/Usage
15-9
-
-
Reserved
8
R/W HEART BEAT
1 = HEART BEAT enable, 0 = HEART BEAT disable. HEART BEAT
function is only valid in 10Mbps mode.
7
R/W JBEN
1 = enable jabber function;
0 = disable jabber function.
6
R/W F_LINK_100
Used to login force good link in 100Mbps for diagnostic purposes. 1 =
DISABLE, 0 = ENABLE.
5
R/W F_Connect
Assertion of this bit forces the disconnect function to be bypassed.
4-3
-
-
Reserved
2
R/W Con_status_En Assertion of this bit configures LED1 pin to indicate connection status.
1
-
-
0
R/W PASS_SCR
Reserved
Bypass Scramble
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0 2004.08.03
Page 18 of 38