SI4712-B30 Datasheet, PDF (9/42 Pages) Silicon Laboratories – FM RADIO TRANSMITTER WITH RECEIVE POWER SCAN

Si4712/13-B30
Table 6. 3-Wire Control Interface Characteristics
(V_DD = 2.7 to 5.5 V, V_IO = 1.5 to 3.6 V, T_A = –20 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max Unit
SCLK Frequency
f_CLK
0
—
2.5
MHz
SCLK High Time
t_HIGH
25
—
—
ns
SCLK Low Time
t_LOW
25
—
—
ns
SDIO Input, SEN to SCLKSetup
t_S
20
—
—
ns
SDIO Input to SCLKHold
SEN Input to SCLKHold
t_HSDIO
t_HSEN
10
—
—
ns
10
—
—
ns
SCLKto SDIO Output Valid
t_CDV
Read
2
—
25
ns
SCLKto SDIO Output High Z
t_CDZ
Read
2
—
25
ns
SCLK, SEN, SDIO, Rise/Fall time
t_R
t_F
—
—
10
ns
Note: When selecting 3-wire mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the
rising edge of RST.
SCLK 70%
30%
SEN ^70%
30%
tR
tF
tS
tHSDIO
tHIGH tLOW
tS
tHSEN
SDIO 70%
30%
A6-A5,
A7
R/W,
A0
A4-A1
D15
D14-D1
D0
Address In
Data In
Figure 4. 3-Wire Control Interface Write Timing Parameters
SCLK 70%
30%
tS
SEN 70%
30%
tHSDIO
tS
tCDV
tHSEN
tCDZ
70%
SDIO
30%
A6-A5,
A7
R/W,
A0
A4-A1
D15
D14-D1
D0
Address In
½ Cycle Bus
Turnaround
Data Out
Figure 5. 3-Wire Control Interface Read Timing Parameters
Rev. 1.1
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