EZR32LG330F256 Datasheet, PDF (77/87 Pages) Silicon Laboratories – EZR32LG Wireless MCUs EZR32LG330 Data Sheet

Alternate
Functionality
US1_RX
LOCATION
0
1
2
3
4
PD1 PD6
US1_TX
US2_CLK
US2_CS
US2_RX
PD0 PD7
PB5
PB6
PB4
US2_TX
PB3
USB_DM
USB_DMPU
USB_DP
USB_VBUS
USB_VBUSEN
USB_VREGI
PF10
PD2
PF11
USB_VBUS
PF5
USB_VREGI
USB_VREGO USB_VREGO
USRF0_RX
PB8
USRF0_TX
PB7
EZR32LG330 Data Sheet
Pinout and Package
5
Description
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave
Output (MISO).
USART1 Asynchronous Transmit.Also used as re-
ceive input in half duplex communication.
USART1 Synchronous mode Master Output / Slave
Input (MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave
Output (MISO).
USART2 Asynchronous Transmit.Also used as re-
ceive input in half duplex communication.
USART2 Synchronous mode Master Output / Slave
Input (MOSI).
USB D- pin.
USB D- Pullup control.
USB D+ pin.
USB 5 V VBUS input.
USB 5 V VBUS enable.
USB Input to internal 3.3 V regulator
USB Decoupling for internal 3.3 V USB regulator and
regulator output
USARTRF0 Asynchronous Receive.
USARTRF0 Synchronous mode Master Input / Slave
Output (MISO).
USARTRF0 Asynchronous Transmit.Also used as
receive input in half duplex communication.
USARTRF0 Synchronous mode Master Output /
Slave Input (MOSI).
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