EZR32LG330F256 Datasheet, PDF (11/87 Pages) Silicon Laboratories – EZR32LG Wireless MCUs EZR32LG330 Data Sheet

Module
ADC0
DAC0
OPAMP
AES
GPIO
Configuration
Full configuration
Full configuration
Full configuration
Full configuration
38 pins
EZR32LG330 Data Sheet
System Overview
Pin Connections
ADC0_CH[7:0]
DAC0_OUT[1:0]
Outputs: OPAMP_OUTx, OPAMP_OUT-
xALT, Inputs: OPAMP_Px, OPAMP_Nx
NA
Available pins are shown in 5.4 GPIO Pin-
out Overview
3.3 Memory Map
The EZR32LG330 memory map is shown below with RAM and flash sizes for the largest memory configuration.
Figure 3.2. EZR32LG330 Memory Map with Largest RAM and Flash Sizes
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