SLWSTK6020A Datasheet, PDF (73/102 Pages) Silicon Laboratories – EFR32BG1 Blue Gecko Bluetooth® Smart SoC Family Data Sheet

EFR32BG1 Blue Gecko Bluetooth® Smart SoCFamily Data Sheet
Pin Definitions
6.3 Alternate Functionality Pinout
A wide selection of alternate functionality is available for multiplexing to various pins. The following table shows the name of the alter-
nate functionality in the first column, followed by columns showing the possible LOCATION bitfield settings.
Note: Some functionality, such as analog interfaces, do not have alternate settings or a LOCATION bitfield. In these cases, the pinout
is shown in the column corresponding to LOCATION 0.
Table 6.5. Alternate functionality overview
Alternate
Functionality
ACMP0_O
ACMP1_O
ADC0_EXTN
0-3
0: PA0
1: PA1
2: PA2
3: PA3
0: PA0
1: PA1
2: PA2
3: PA3
0: PA0
ADC0_EXTP
0: PA1
CMU_CLK0
CMU_CLK1
0: PA1
1: PB15
2: PC6
3: PC11
0: PA0
1: PB14
2: PC7
3: PC10
0: PF0
DBG_SWCLKTCK
0: PF1
DBG_SWDIOTMS
4-7
4: PA4
5: PA5
6: PB11
7: PB12
4: PA4
5: PA5
6: PB11
7: PB12
5: PD14
6: PF2
7: PF7
4: PD10
5: PD15
6: PF3
7: PF6
LOCATION
8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31
Description
8: PB13
9: PB14
10: PB15
11: PC6
12: PC7
13: PC8
14: PC9
15: PC10
16: PC11
18: PD10
19: PD11
20: PD12
21: PD13
22: PD14
23: PD15
24: PF0
25: PF1
26: PF2
27: PF3
28: PF4
29: PF5
30: PF6
31: PF7
Analog comparator
ACMP0, digital out-
put.
8: PB13
9: PB14
10: PB15
11: PC6
12: PC7
13: PC8
14: PC9
15: PC10
16: PC11
18: PD10
19: PD11
20: PD12
21: PD13
22: PD14
23: PD15
24: PF0
25: PF1
26: PF2
27: PF3
28: PF4
29: PF5
30: PF6
31: PF7
Analog comparator
ACMP1, digital out-
put.
Analog to digital
converter ADC0 ex-
ternal reference in-
put negative pin
Analog to digital
converter ADC0 ex-
ternal reference in-
put positive pin
Clock Management
Unit, clock output
number 0.
Clock Management
Unit, clock output
number 1.
Debug-interface
Serial Wire clock
input and JTAG
Test Clock.
Note that this func-
tion is enabled to
the pin out of reset,
and has a built-in
pull down.
Debug-interface
Serial Wire data in-
put / output and
JTAG Test Mode
Select.
Note that this func-
tion is enabled to
the pin out of reset,
and has a built-in
pull up.
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