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ISL6526-A Datasheet, PDF (7/18 Pages) Intersil Corporation – Operates from 3.3V to 5V Input
ISL6526, ISL6526A
Electrical Specifications
PARAMETER
Recommended Operating Conditions, unless otherwise noted VCC = 3.3V ±5% and TA = +25°C. (Continued)
SYMBOL
TEST CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8)
UNITS
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION/DISABLE
IUGATE-SRC VBOOT - VPHASE = 5V, VUGATE = 4V
IUGATE-SNK
ILGATE-SRC VVCC = 3.3V, VLGATE = 4V
ILGATE-SNK
-
-1
-
A
-
1
-
A
-
-1
-
A
-
2
-
A
OCSET Current Source
IOCSET
Commercial
Industrial
18
20
22
µA
16
20
22
µA
Disable Threshold
VDISABLE
-
-
0.8
V
NOTE:
7. Limits should be considered typical and are not production tested.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Functional Pin Descriptions
14 LD SOIC
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 ENABLE
8 COMP
16 LD 5X5 QFN
TOP VIEW
16 15 14 13
CPVOUT 1
CT1 2
CT2 3
OCSET 4
12 PHASE
11 VCC
10 CPGND
9 NC
5678
VCC
This pin provides the bias supply for the ISL6526, ISL6526A.
Connect a well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
output. These pins are used to compensate the voltage
control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin provides
the PWM-controlled gate drive for the lower MOSFET. This pin
is also monitored by the adaptive shoot-through protection
circuitry to determine when the lower MOSFET has turned off.
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7
FN9055.12
September 30, 2015