EFM32LG395 Datasheet, PDF (60/82 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

BGA120 Pin#
and Name
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Pin Alternate Functionality / Description
Pin Name
Analog
EBI
Timers
Communication
Other
H11 VDD_DREG Power supply for on-chip voltage regulator.
H12
PE2
BU_VOUT
EBI_A09 #0
TIM3_CC2 #1
U1_TX #3
ACMP0_O #1
H13
PC7
ACMP0_CH7
EBI_A06 #0/1/2
LEU1_RX #0
I2C0_SCL #2
LES_CH7 #0
ETM_TD0 #2
J1
PD14
I2C0_SDA #3
J2
PD15
I2C0_SCL #3
J3
VSS
Ground
J11
IOVDD_3
Digital IO power supply 3.
J12
PC6
ACMP0_CH6
EBI_A05 #0/1/2
LEU1_TX #0
I2C0_SDA #2
LES_CH6 #0
ETM_TCLK #2
J13
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
K1
PC0
ACMP0_CH0
DAC0_OUT0ALT #0/
OPAMP_OUT0ALT
EBI_A23 #0/1/2
TIM0_CC1 #4
PCNT0_S0IN #2
US0_TX #5
US1_TX #0
I2C0_SDA #4
LES_CH0 #0
PRS_CH2 #0
K2
PC1
ACMP0_CH1
DAC0_OUT0ALT #1/
OPAMP_OUT0ALT
EBI_A24 #0/1/2
TIM0_CC2 #4
PCNT0_S1IN #2
US0_RX #5
US1_RX #0
I2C0_SCL #4
LES_CH1 #0
PRS_CH3 #0
K3
IOVDD_4
Digital IO power supply 4.
K11
VSS
Ground
K12
VSS
Ground
K13
PD8
BU_VIN
CMU_CLK1 #1
L1
PC2
ACMP0_CH2
DAC0_OUT0ALT #2/
OPAMP_OUT0ALT
EBI_A25 #0/1/2
TIM0_CDTI0 #4
US2_TX #0
LES_CH2 #0
ACMP0_CH3
L2
PC3
DAC0_OUT0ALT #3/ EBI_NANDREn #0/1/2
TIM0_CDTI1 #4
OPAMP_OUT0ALT
US2_RX #0
LES_CH3 #0
L3
PA7
EBI_CSTFT #0/1/2
L4
IOVDD_5
Digital IO power supply 5.
L5
VSS
Ground
L6
VSS
Ground
L7
IOVDD_6
Digital IO power supply 6.
L8
PB9
EBI_A03 #0/1/2
U1_TX #2
L9
PB10
EBI_A04 #0/1/2
U1_RX #2
L10
PD0
ADC0_CH0
DAC0_OUT0ALT #4/
OPAMP_OUT0ALT
OPAMP_OUT2 #1
PCNT2_S0IN #0
US1_TX #1
L11
PD1
ADC0_CH1
DAC0_OUT1ALT #4/
OPAMP_OUT1ALT
TIM0_CC0 #3
PCNT2_S1IN #0
US1_RX #1
DBG_SWO #2
L12
PD4
ADC0_CH4
OPAMP_P2
LEU0_TX #0
ETM_TD2 #0/2
L13
PD7
ADC0_CH7
DAC0_N1 /
OPAMP_N1
TIM1_CC1 #4
LETIM0_OUT1 #0
PCNT0_S1IN #3
US1_TX #2
I2C0_SCL #1
CMU_CLK0 #2
LES_ALTEX1 #0
ACMP1_O #2
ETM_TCLK #0
M1
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
2014-06-13 - EFM32LG395FXX - d0114_Rev1.30
60
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