SI5346-EVB Datasheet, PDF (6/20 Pages) Silicon Laboratories – Powered from USB port or external power supply

Si5346-EVB
6. Clock Input Circuits (INx/INxB)
The Si5346-EVB has eight SMA connectors (IN0/IN0B–IN3/IN3B) for receiving external clock signals. All input
clocks are terminated as shown in Figure 4 below. Note input clocks are AC coupled and 50 ohm terminated. This
represents 4 differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the
differential pair with a single-ended clock. For details on how to configure inputs as single-ended, please refer to
the Si5346 data sheet. Typically a 0.1 F DC block is sufficient, however, 10 F may be needed for lower input
frequencies. Note that the EVB is populated with both DC block capacitor values.
Figure 4. Input Clock Termination Circuit
7. Clock Output Circuits (OUTx/OUTxB)
Each of the eight output drivers (4 differential pairs) is AC coupled to its respective SMA connector. The output
clock termination circuit is shown in Figure 5 below. The output signal will have no DC bias. If DC coupling is
required, the AC coupling capacitors can be replaced with a resistor of appropriate value. The Si5346-EVB
provides an L-network at OUT0/OUT0B output pins for optional output termination resistors. Note that components
with schematic “NI” designation are not normally populated.
Figure 5. Output Clock Termination Circuit
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Rev. 1.0