SI5346-EVB Datasheet, PDF (12/20 Pages) Silicon Laboratories – Powered from USB port or external power supply

Si5346-EVB
Figure 16. Write Design to EVB
Failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile
memory (NVM). However, the plan loaded from the NVM may not be the latest plan recommended by
Silicon Labs for evaluation.
At this point, you should verify the presence and frequencies of the output clocks (running to free-run mode from
the crystal) using appropriate external instrumentation connected to the output clock SMA connectors. To verify the
output clocks are toggling at the correct frequency and signal format, click on View Design Report as highlighted
below.
Figure 17. View Design Report
Your configuration’s design report will appear in a new window, as shown below. Compare the observed output
clocks to the frequencies and formats noted in your default project’s Design Report.
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Rev. 1.0