EFM32LG942 Datasheet, PDF (57/78 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFP64 Pin#
and Name
Pin Name
Analog
...the world's most energy friendly microcontrollers
Pin Alternate Functionality / Description
Timers
Communication
Other
31
PD3
ADC0_CH3
OPAMP_N2
TIM0_CC2 #3
US1_CS #1
ETM_TD1 #0/2
32
PD4
ADC0_CH4
OPAMP_P2
LEU0_TX #0
ETM_TD2 #0/2
33
PD5
ADC0_CH5
OPAMP_OUT2 #0
LEU0_RX #0
ETM_TD3 #0/2
34
PD6
ADC0_CH6
DAC0_P1 /
OPAMP_P1
TIM1_CC0 #4
LETIM0_OUT0 #0
PCNT0_S0IN #3
US1_RX #2
I2C0_SDA #1
LES_ALTEX0 #0
ACMP0_O #2
ETM_TD0 #0
35
PD7
ADC0_CH7
DAC0_N1 /
OPAMP_N1
TIM1_CC1 #4
LETIM0_OUT1 #0
PCNT0_S1IN #3
US1_TX #2
I2C0_SCL #1
CMU_CLK0 #2
LES_ALTEX1 #0
ACMP1_O #2
ETM_TCLK #0
36
PD8
BU_VIN
CMU_CLK1 #1
37
PC6
ACMP0_CH6
LEU1_TX #0
I2C0_SDA #2
LES_CH6 #0
ETM_TCLK #2
38
PC7
ACMP0_CH7
LEU1_RX #0
I2C0_SCL #2
LES_CH7 #0
ETM_TD0 #2
39
VDD_DREG
Power supply for on-chip voltage regulator.
40
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
41
PE4
LCD_COM0
US0_CS #1
42
PE5
LCD_COM1
US0_CLK #1
43
PE6
LCD_COM2
US0_RX #1
44
PE7
LCD_COM3
US0_TX #1
45
USB_VREGI
USB Input to internal 3.3 V regulator.
46
USB_VREGO
USB Decoupling for internal 3.3 V USB regulator and regulator output.
47
PF10
USB_DM
48
PF11
USB_DP
49
PF0
TIM0_CC0 #5
LETIM0_OUT0 #2
US1_CLK #2
LEU0_TX #3
I2C0_SDA #5
DBG_SWCLK #0/1/2/3
50
PF1
TIM0_CC1 #5
LETIM0_OUT1 #2
US1_CS #2
LEU0_RX #3
I2C0_SCL #5
DBG_SWDIO #0/1/2/3
GPIO_EM4WU3
51
PF2
LCD_SEG0
TIM0_CC2 #5
LEU0_TX #4
ACMP1_O #0
DBG_SWO #0
GPIO_EM4WU4
52
USB_VBUS
USB 5.0 V VBUS input.
53
PF12
USB_ID
54
PF5
LCD_SEG3
TIM0_CDTI2 #2/5
USB_VBUSEN #0
PRS_CH2 #1
55
IOVDD_5
Digital IO power supply 5.
56
VSS
Ground
57
PE8
LCD_SEG4
PCNT2_S0IN #1
PRS_CH3 #1
58
PE9
LCD_SEG5
PCNT2_S1IN #1
59
PE10
LCD_SEG6
TIM1_CC0 #1
US0_TX #0
BOOT_TX
60
PE11
LCD_SEG7
TIM1_CC1 #1
US0_RX #0
LES_ALTEX5 #0
BOOT_RX
61
PE12
LCD_SEG8
TIM1_CC2 #1
US0_RX #3
CMU_CLK1 #2
2014-06-13 - EFM32LG942FXX - d0121_Rev1.30
57
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