EFM32WG395 Datasheet, PDF (55/82 Pages) List of Unclassifed Manufacturers – The EFM32 MCUs are the world’s most energy friendly microcontrollers.

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Table 3.29. SPI Master Timing with SSSEARLY and SMSDELAY
Symbol
Parameter
Condition
Min
Typ
t_SCLK ^{1 2}
SCLK period
2 * t_HFPER-
CLK
t_{CS_MO} ¹²
CS to MOSI
-2.00
t_{SCLK_MO} ¹²
SCLK to MOSI
-1.00
t_{SU_MI} ¹²
MISO setup time IOVDD = 3.0 V
-32.00
t_{H_MI} ¹²
MISO hold time
63.00
1_{Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)}
2_{Measurement done at 10% and 90% of VDD (figure shows 50% of VDD)}
Figure 3.44. SPI Slave Timing
Max
Unit
ns
2.00 ns
3.00 ns
ns
ns
CS
SCLK
CLKPOL = 0
SCLK
CLKPOL = 1
MOSI
MISO
t _{CS_ACT_MI}
t _{SU_MO}
t _{H_MO}
t _{SCLK_HI}
t _{SCLK_LO}
t _SCLK
t _{SCLK_MI}
t _{CS_DIS_MI}
Table 3.30. SPI Slave Timing
Symbol
Parameter
Min
Typ
t_{SCLK_sl} ^{1 2}
SCKL period
6 * t_HFPER-
CLK
t_{SCLK_hi} ^{1 2}
SCLK high period
3 * t_HFPER-
CLK
t_{SCLK_lo} ^{1 2}
SCLK low period
3 * t_HFPER-
CLK
t_{CS_ACT_MI} ^{1 2}
CS active to MISO
5.00
t_{CS_DIS_MI} ^{1 2}
CS disable to MISO
5.00
t_{SU_MO} ^{1 2}
MOSI setup time
5.00
t_{H_MO} ^{1 2}
MOSI hold time
2 + 2 * t_HF-
PERCLK
t_{SCLK_MI} ^{1 2}
SCLK to MISO
7 + t_HFPER-
CLK
1_{Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)}
2_{Measurement done at 10% and 90% of VDD (figure shows 50% of VDD)}
Table 3.31. SPI Slave Timing with SSSEARLY and SMSDELAY
Symbol
t_{SCLK_sl} ¹²
Parameter
SCKL period
Min
Typ
6 * t_HFPER-
CLK
2014-06-13 - EFM32WG395FXX - d0194_Rev1.40
55
Max
Unit
ns
ns
ns
35.00 ns
35.00 ns
ns
ns
42 + 2 * ns
t_HFPERCLK
Max
Unit
ns
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