EFM32GG840 Datasheet, PDF (54/73 Pages) Silicon Laboratories – Read-while-write support

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Alternate
LOCATION
Functionality 0
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Description
ADC0_CH4
PD4
Analog to digital converter ADC0, input channel number 4.
ADC0_CH5
PD5
Analog to digital converter ADC0, input channel number 5.
ADC0_CH6
PD6
Analog to digital converter ADC0, input channel number 6.
ADC0_CH7
PD7
Analog to digital converter ADC0, input channel number 7.
BOOT_RX
PE11
Bootloader RX
BOOT_TX
PE10
Bootloader TX
BU_VIN
PD8
Battery input for Backup Power Domain
CMU_CLK0
PA2
PC12 PD7
Clock Management Unit, clock output number 0.
CMU_CLK1
PA1
PD8
PE12
Clock Management Unit, clock output number 1.
DAC0_N0 /
OPAMP_N0
PC5
Operational Amplifier 0 external negative input.
DAC0_N1 /
OPAMP_N1
PD7
Operational Amplifier 1 external negative input.
OPAMP_N2
PD3
Operational Amplifier 2 external negative input.
DAC0_OUT0 /
OPAMP_OUT0
PB11
Digital to Analog Converter DAC0_OUT0 /
OPAMP output channel number 0.
DAC0_OUT0ALT /
OPAMP_OUT0ALT
PD0
Digital to Analog Converter DAC0_OUT0ALT /
OPAMP alternative output for channel 0.
DAC0_OUT1 /
OPAMP_OUT1
PB12
Digital to Analog Converter DAC0_OUT1 /
OPAMP output channel number 1.
DAC0_OUT1ALT /
OPAMP_OUT1ALT
PC12
PC13
PC14 PC15
PD1
Digital to Analog Converter DAC0_OUT1ALT /
OPAMP alternative output for channel 1.
OPAMP_OUT2 PD5
PD0
Operational Amplifier 2 output.
DAC0_P0 /
OPAMP_P0
PC4
Operational Amplifier 0 external positive input.
DAC0_P1 /
OPAMP_P1
PD6
Operational Amplifier 1 external positive input.
OPAMP_P2
PD4
Operational Amplifier 2 external positive input.
DBG_SWCLK
PF0
PF0
PF0 PF0
Debug-interface Serial Wire clock input.
Note that this function is enabled to pin out of reset, and has
a built-in pull down.
DBG_SWDIO
PF1
PF1
PF1 PF1
Debug-interface Serial Wire data input / output.
Note that this function is enabled to pin out of reset, and has
a built-in pull up.
DBG_SWO
PF2
PC15 PD1 PD2
Debug-interface Serial Wire viewer Output.
Note that this function is not enabled after reset, and must be
enabled by software to be used.
ETM_TCLK
PD7
PC6 PA6
Embedded Trace Module ETM clock .
ETM_TD0
PD6
PC7 PA2
Embedded Trace Module ETM data 0.
ETM_TD1
PD3
PD3 PA3
Embedded Trace Module ETM data 1.
ETM_TD2
PD4
PD4 PA4
Embedded Trace Module ETM data 2.
ETM_TD3
PD5
PF3
PD5 PA5
Embedded Trace Module ETM data 3.
GPIO_EM4WU0 PA0
Pin can be used to wake the system up from EM4
GPIO_EM4WU1 PA6
Pin can be used to wake the system up from EM4
GPIO_EM4WU3 PF1
Pin can be used to wake the system up from EM4
GPIO_EM4WU4 PF2
Pin can be used to wake the system up from EM4
GPIO_EM4WU5 PE13
Pin can be used to wake the system up from EM4
2014-05-23 - EFM32GG840FXX - d0041_Rev1.30
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