EFM32GG840 Datasheet, PDF (51/73 Pages) Silicon Laboratories – Read-while-write support

QFN64 Pin#
and Name
Pin Name
Analog
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Pin Alternate Functionality / Description
Timers
Communication
Other
3
PA2
LCD_SEG15
TIM0_CC2 #0/1
CMU_CLK0 #0
ETM_TD0 #3
4
PA3
LCD_SEG16
TIM0_CDTI0 #0
LES_ALTEX2 #0
ETM_TD1 #3
5
PA4
LCD_SEG17
TIM0_CDTI1 #0
LES_ALTEX3 #0
ETM_TD2 #3
6
PA5
LCD_SEG18
TIM0_CDTI2 #0
LEU1_TX #1
LES_ALTEX4 #0
ETM_TD3 #3
7
PA6
LCD_SEG19
LEU1_RX #1
ETM_TCLK #3
GPIO_EM4WU1
8
IOVDD_0
Digital IO power supply 0.
9
PB3
LCD_SEG20/
LCD_COM4
PCNT1_S0IN #1
US2_TX #1
10
PB4
LCD_SEG21/
LCD_COM5
PCNT1_S1IN #1
US2_RX #1
11
PB5
LCD_SEG22/
LCD_COM6
US2_CLK #1
12
PB6
LCD_SEG23/
LCD_COM7
US2_CS #1
13
PC4
ACMP0_CH4
DAC0_P0 /
OPAMP_P0
TIM0_CDTI2 #4
LETIM0_OUT0 #3
PCNT1_S0IN #0
US2_CLK #0
I2C1_SDA #0
LES_CH4 #0
14
PC5
ACMP0_CH5
DAC0_N0 /
OPAMP_N0
LETIM0_OUT1 #3
PCNT1_S1IN #0
US2_CS #0
I2C1_SCL #0
LES_CH5 #0
15
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
16
PB8
LFXTAL_N
TIM1_CC1 #3
US0_RX #4
US1_CS #0
17
PA12
LCD_BCAP_P
TIM2_CC0 #1
18
PA13
LCD_BCAP_N
TIM2_CC1 #1
19
PA14
LCD_BEXT
TIM2_CC2 #1
Reset input, active low.
20
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up en-
sure that reset is released.
21
PB11
DAC0_OUT0 /
OPAMP_OUT0
LETIM0_OUT0 #1
TIM1_CC2 #3
I2C1_SDA #1
22
PB12
DAC0_OUT1 /
OPAMP_OUT1
LETIM0_OUT1 #1
I2C1_SCL #1
23
AVDD_1
Analog power supply 1.
24
PB13
HFXTAL_P
US0_CLK #4/5
LEU0_TX #1
25
PB14
HFXTAL_N
US0_CS #4/5
LEU0_RX #1
26
IOVDD_3
Digital IO power supply 3.
27
AVDD_0
Analog power supply 0.
28
PD0
ADC0_CH0
DAC0_OUT0ALT #4/
OPAMP_OUT0ALT
OPAMP_OUT2 #1
PCNT2_S0IN #0
US1_TX #1
29
PD1
ADC0_CH1
DAC0_OUT1ALT #4/
TIM0_CC0 #3
PCNT2_S1IN #0
US1_RX #1
DBG_SWO #2
2014-05-23 - EFM32GG840FXX - d0041_Rev1.30
51
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