EFM32HG222 Datasheet, PDF (53/70 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFP48 Pin#
and Name
Preliminary
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Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
3
PA2
TIM0_CC2 #0/1
CMU_CLK0 #0
4
IOVDD_0
Digital IO power supply 0.
5
VSS
Ground.
6
PC0
ACMP0_CH0
TIM0_CC1 #4
PCNT0_S0IN #2
US0_TX #5/6
US1_TX #0
US1_CS #5
I2C0_SDA #4
PRS_CH2 #0
7
PC1
ACMP0_CH1
TIM0_CC2 #4
PCNT0_S1IN #2
US0_RX #5/6
US1_TX #5
US1_RX #0
I2C0_SCL #4
PRS_CH3 #0
8
PC2
ACMP0_CH2
TIM0_CDTI0 #4
US1_RX #5
9
PC3
ACMP0_CH3
TIM0_CDTI1 #4
US1_CLK #5
10
PC4
ACMP0_CH4
TIM0_CDTI2 #4
GPIO_EM4WU6
11
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
12
PB8
LFXTAL_N
TIM1_CC1 #3
US0_RX #4
US1_CS #0
13
PA8
TIM2_CC0 #0
14
PA9
TIM2_CC1 #0
15
PA10
TIM2_CC2 #0
Reset input, active low.
16
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up
ensure that reset is released.
17
PB11
IDAC0_OUT
TIM1_CC2 #3
PCNT0_S1IN #4
US1_CLK #4
CMU_CLK1 #3
ACMP0_O #3
18
VSS
Ground.
19
AVDD_1
Analog power supply 1.
20
PB13
HFXTAL_P
US0_CLK #4/5
LEU0_TX #1
21
PB14
HFXTAL_N
US0_CS #4/5
LEU0_RX #1
22
IOVDD_3
Digital IO power supply 3.
23
AVDD_0
Analog power supply 0.
24
PD4
ADC0_CH4
LEU0_TX #0
25
PD5
ADC0_CH5
LEU0_RX #0
26
PD6
ADC0_CH6
TIM1_CC0 #4
PCNT0_S0IN #3
US1_RX #2/3
I2C0_SDA #1
ACMP0_O #2
27
PD7
ADC0_CH7
TIM1_CC1 #4
PCNT0_S1IN #3
US1_TX #2/3
I2C0_SCL #1
CMU_CLK0 #2
28
VDD_DREG
Power supply for on-chip voltage regulator.
29
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
30
PC8
TIM2_CC0 #2
US0_CS #2
31
PC9
TIM2_CC1 #2
US0_CLK #2
GPIO_EM4WU2
32
PC10
TIM2_CC2 #2
US0_RX #2
33
PC11
US0_TX #2
34
PC13
TIM0_CDTI0 #1/6
2015-05-06 - EFM32HG222FXX - _Rev0.91
53
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