EFM32G230 Datasheet, PDF (53/70 Pages) Silicon Laboratories – Wake-up Interrupt Controller

Alternate
Functionality
US1_TX
US2_CLK
US2_CS
US2_RX
LOCATION
0
1
2
PC0
PD0
PC4
PC5
PC3
US2_TX
PC2
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3
Description
USART1 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART1 Synchronous mode Master Output / Slave Input (MOSI).
USART2 clock input / output.
USART2 chip select input / output.
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output (MISO).
USART2 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART2 Synchronous mode Master Output / Slave Input (MOSI).
4.3 GPIO Pinout Overview
The specific GPIO pins available in EFM32G230 is shown in Table 4.3 (p. 53) . Each GPIO port is
organized as 16-bit ports indicated by letters A through F, and the individual pin on this port is indicated
by a number from 15 down to 0.
Table 4.3. GPIO Pinout
Port
Port A
Port B
Port C
Port D
Port E
Port F
Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
PA15 -
-
-
- PA10 PA9 PA8
-
PA6 PA5 PA4 PA3 PA2 PA1 PA0
- PB14 PB13 PB12 PB11 -
-
PB8 PB7
-
-
-
-
-
-
-
PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
-
-
-
-
-
-
-
PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PF5 PF4 PF3 PF2 PF1 PF0
2015-05-22 - EFM32G230FXX - d0005_Rev1.90
53
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