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EFM32TG825 Datasheet, PDF (52/67 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode
Table 4.3. GPIO Pinout
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Port
Port A
Port B
Port C
Port D
Port E
Port F
Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
- PA14 PA13 PA12 -
-
-
-
-
-
-
-
-
PA2 PA1 PA0
- PB14 PB13 - PB11 -
-
PB8 PB7 PB6 PB5 PB4 PB3
-
-
-
PC15 PC14 PC13 -
-
-
-
-
-
-
-
PC4
-
-
-
-
-
-
-
-
-
-
-
-
PD7 PD6 PD5 PD4
-
-
-
-
-
- PE13 PE12 PE11 PE10 -
-
PE7 PE6 PE5 PE4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PF5 PF4 PF3 PF2 PF1 PF0
4.4 Opamp Pinout Overview
The specific opamp terminals available in EFM32TG825 is shown in Figure 4.2 (p. 52) .
Figure 4.2. Opamp Pinout
PC4
+ OUT0ALT
OPA0 OUT0
-
PD4
+
OPA2
-
OUT2
PD6
+ OUT1ALT
OPA1 OUT1
PD7
-
PB1 1
PC1 3
PC1 4
PC1 5
PD5
2015-03-06 - EFM32TG825FXX - d0206_Rev1.40
52
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