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EFM32WG332 Datasheet, PDF (50/76 Pages) Silicon Laboratories – Operation from backup battery when main power drains out
Table 3.21. I2C Fast-mode (Fm)
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Symbol
Parameter
Min
Typ
Max
Unit
fSCL
SCL clock frequency
0
4001 kHz
tLOW
SCL clock low time
1.3
µs
tHIGH
SCL clock high time
0.6
µs
tSU,DAT
tHD,DAT
SDA set-up time
SDA hold time
100
ns
8
9002,3 ns
tSU,STA
Repeated START condition set-up time
0.6
µs
tHD,STA
(Repeated) START condition hold time
0.6
µs
tSU,STO
STOP condition set-up time
0.6
µs
tBUF
Bus free time between a STOP and a START condi-
1.3
µs
tion
1For the minimum HFPERCLK frequency required in Fast-mode, see the I2C chapter in the EFM32WG Reference Manual.
2The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW).
3When transmitting data, this number is guaranteed only when I2Cn_CLKDIV < ((900*10-9 [s] * fHFPERCLK [Hz]) - 4).
Table 3.22. I2C Fast-mode Plus (Fm+)
Symbol
Parameter
Min
Typ
Max
Unit
fSCL
SCL clock frequency
0
10001 kHz
tLOW
SCL clock low time
0.5
µs
tHIGH
SCL clock high time
0.26
µs
tSU,DAT
SDA set-up time
50
ns
tHD,DAT
SDA hold time
8
ns
tSU,STA
Repeated START condition set-up time
0.26
µs
tHD,STA
(Repeated) START condition hold time
0.26
µs
tSU,STO
STOP condition set-up time
0.26
µs
tBUF
Bus free time between a STOP and a START condi-
0.5
µs
tion
1For the minimum HFPERCLK frequency required in Fast-mode Plus, see the I2C chapter in the EFM32WG Reference Manual.
2014-06-13 - EFM32WG332FXX - d0191_Rev1.40
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