EFM32G200 Datasheet, PDF (48/67 Pages) Silicon Laboratories – Wake-up Interrupt Controller

QFN32 Pin#
and Name
...the world's most energy friendly microcontrollers
Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
3
PA2
TIM0_CC2 #0/1
CMU_CLK0 #0
4
IOVDD_1
Digital IO power supply 1.
5
PC0
ACMP0_CH0
PCNT0_S0IN #2
US1_TX #0
6
PC1
ACMP0_CH1
PCNT0_S1IN #2
US1_RX #0
7
PB7
LFXTAL_P
US1_CLK #0
8
PB8
LFXTAL_N
US1_CS #0
Reset input, active low.
9
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up
ensure that reset is released.
10
PB11
DAC0_OUT0
LETIM0_OUT0 #1
11
AVDD_2
Analog power supply 2.
12
PB13
HFXTAL_P
LEU0_TX #1
13
PB14
HFXTAL_N
LEU0_RX #1
14
IOVDD_3
Digital IO power supply 3.
15
AVDD_0
Analog power supply 0.
16
PD4
ADC0_CH4
LEU0_TX #0
17
PD5
ADC0_CH5
LEU0_RX #0
18
PD6
ADC0_CH6
LETIM0_OUT0 #0
I2C0_SDA #1
19
PD7
ADC0_CH7
LETIM0_OUT1 #0
I2C0_SCL #1
20
VDD_DREG
Power supply for on-chip voltage regulator.
21
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
22
PC13
ACMP1_CH5
TIM0_CDTI0 #1/3
TIM1_CC0 #0
PCNT0_S0IN #0
23
PC14
ACMP1_CH6
TIM0_CDTI1 #1/3
TIM1_CC1 #0
PCNT0_S1IN #0
24
PC15
ACMP1_CH7
TIM0_CDTI2 #1/3
TIM1_CC2 #0
DBG_SWO #1
25
PF0
LETIM0_OUT0 #2
DBG_SWCLK #0/1
26
PF1
LETIM0_OUT1 #2
DBG_SWDIO #0/1
27
PF2
ACMP1_O #0
DBG_SWO #0
28
IOVDD_5
Digital IO power supply 5.
29
PE10
TIM1_CC0 #1
US0_TX #0
BOOT_TX
30
PE11
TIM1_CC1 #1
US0_RX #0
BOOT_RX
31
PE12
TIM1_CC2 #1
US0_CLK #0
32
PE13
US0_CS #0
ACMP0_O #0
4.2 Alternate Functionality Pinout
A wide selection of alternate functionality is available for multiplexing to various pins. This is shown in
Table 4.2 (p. 49) . The table shows the name of the alternate functionality in the first column, followed
by columns showing the possible LOCATION bitfield settings.
2015-05-22 - EFM32G200FXX - d0003_Rev1.90
48
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