EFM32G200 Datasheet, PDF (41/67 Pages) Silicon Laboratories – Wake-up Interrupt Controller

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Symbol
Parameter
Condition
Min
Continuous Mode
f_DAC
DAC clock frequen-
cy
Sample/Hold Mode
Sample/Off Mode
CYC_DACCONV Clock cyckles per
conversion
t_DACCONV
t_DACSETTLE
SNR_DAC
Conversion time
Settling time
Signal to Noise Ra-
tio (SNR)
500 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
500 kSamples/s, 12 bit, single
ended, internal 2.5V reference
SNDR_DAC
Signal to Noise-
pulse Distortion Ra-
tio (SNDR)
500 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
500 kSamples/s, 12 bit, single
ended, internal 2.5V reference
SFDR_DAC
Spurious-Free
Dynamic
Range(SFDR)
500 kSamples/s, 12 bit, sin-
gle ended, internal 1.25V refer-
ence
500 kSamples/s, 12 bit, single
ended, internal 2.5V reference
V_DACOFFSET Offset voltage
V_DACSHMDRIFT Sample-hold mode
voltage drift
After calibration, single ended
DNL_DAC
Differential non-lin-
earity
INL_DAC
Integral non-lineari-
ty
MC_DAC
No missing codes
1_{Measured with a static input code and no loading on the output.}
Typ
2
Max
Unit
1000 kHz
250 kHz
250 kHz
2
µs
5
µs
58
dB
59
dB
57
dB
54
dB
62
dBc
56
dBc
2
mV
540
µV/ms
±1
LSB
±5
LSB
12
bits
2015-05-22 - EFM32G200FXX - d0003_Rev1.90
41
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