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EFM32G290 Datasheet, PDF (46/72 Pages) Silicon Laboratories – Wake-up Interrupt Controller
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Table 3.19. I2C Fast-mode (Fm)
Symbol
fSCL
tLOW
Parameter
SCL clock frequency
SCL clock low time
Min
Typ
0
1.3
Max
Unit
4001 kHz
µs
tHIGH
SCL clock high time
0.6
µs
tSU,DAT
tHD,DAT
SDA set-up time
SDA hold time
100
ns
8
9002,3 ns
tSU,STA
Repeated START condition set-up time
0.6
µs
tHD,STA
(Repeated) START condition hold time
0.6
µs
tSU,STO
STOP condition set-up time
0.6
µs
tBUF
Bus free time between a STOP and START condition
1.3
µs
1For the minimum HFPERCLK frequency required in Fast-mode, see the I2C chapter in the EFM32G Reference Manual.
2The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW).
3When transmitting data, this number is guaranteed only when I2Cn_CLKDIV < ((900*10-9 [s] * fHFPERCLK [Hz]) - 4).
Table 3.20. I2C Fast-mode Plus (Fm+)
Symbol
Parameter
Min
Typ
Max
Unit
fSCL
SCL clock frequency
0
10001 kHz
tLOW
SCL clock low time
0.5
µs
tHIGH
SCL clock high time
0.26
µs
tSU,DAT
SDA set-up time
50
ns
tHD,DAT
SDA hold time
8
ns
tSU,STA
Repeated START condition set-up time
0.26
µs
tHD,STA
(Repeated) START condition hold time
0.26
µs
tSU,STO
STOP condition set-up time
0.26
µs
tBUF
Bus free time between a STOP and START condition
0.5
µs
1For the minimum HFPERCLK frequency required in Fast-mode Plus, see the I2C chapter in the EFM32G Reference Manual.
3.15 Digital Peripherals
Table 3.21. Digital Peripherals
Symbol
IUSART
IUART
ILEUART
II2C
ITIMER
ILETIMER
Parameter
USART current
UART current
LEUART current
I2C current
Condition
Min
USART idle current, clock en-
abled
UART idle current, clock en-
abled
LEUART idle current, clock en-
abled
I2C idle current, clock enabled
TIMER current
LETIMER current
TIMER_0 idle current, clock
enabled
LETIMER idle current, clock
enabled
Typ
Max
7.5
5.63
150
6.25
8.75
150
Unit
µA/
MHz
µA/
MHz
nA
µA/
MHz
µA/
MHz
nA
2015-05-22 - EFM32G290FXX - d0007_Rev1.90
46
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