EFM32GG230 Datasheet, PDF (44/70 Pages) List of Unclassifed Manufacturers – High Performance 32-bit processor up to 48 MHz

...the world's most energy friendly microcontrollers
Table 3.21. I2C Fast-mode (Fm)
Symbol
f_SCL
Parameter
SCL clock frequency
Min
Typ
0
Max
Unit
400¹ kHz
t_LOW
SCL clock low time
1.3
µs
t_HIGH
SCL clock high time
0.6
µs
t_SU,DAT
t_HD,DAT
SDA set-up time
SDA hold time
100
ns
8
900^2,3 ns
t_SU,STA
Repeated START condition set-up time
0.6
µs
t_HD,STA
(Repeated) START condition hold time
0.6
µs
t_SU,STO
STOP condition set-up time
0.6
µs
t_BUF
Bus free time between a STOP and START condition
1.3
µs
1_{For the minimum HFPERCLK frequency required in Fast-mode, see the I2C chapter in the EFM32GG Reference Manual.}
2_{The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW).}
3_{When transmitting data, this number is guaranteed only when I2Cn_CLKDIV < ((900*10}-9 _{[s] * fHFPERCLK [Hz]) - 4).}
Table 3.22. I2C Fast-mode Plus (Fm+)
Symbol
Parameter
Min
Typ
Max
Unit
f_SCL
SCL clock frequency
0
1000¹ kHz
t_LOW
SCL clock low time
0.5
µs
t_HIGH
SCL clock high time
0.26
µs
t_SU,DAT
SDA set-up time
50
ns
t_HD,DAT
SDA hold time
8
ns
t_SU,STA
Repeated START condition set-up time
0.26
µs
t_HD,STA
(Repeated) START condition hold time
0.26
µs
t_SU,STO
STOP condition set-up time
0.26
µs
t_BUF
Bus free time between a STOP and START condition
0.5
µs
1_{For the minimum HFPERCLK frequency required in Fast-mode Plus, see the I2C chapter in the EFM32GG Reference Manual.}
3.16 USART SPI
Figure 3.28. SPI Master Timing
CS
SCLK
CLKPOL = 0
SCLK
CLKPOL = 1
MOSI
MISO
t _{CS_MO}
t _{SCKL_MO}
t _SCLK
t _{SU_MI}
t _{H_MI}
2014-05-23 - EFM32GG230FXX - d0035_Rev1.30
44
www.silabs.com