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SI52144-EVB Datasheet, PDF (4/6 Pages) Silicon Laboratories – Power consumption test
Si52144-EVB
2. Schematics
VDD1
VDD6
VDD12
VDD17
VDD21
OE2
For Si52144,R10 open
OE0
For Si53154,R11 open
OE3
SSON
VDD1
R11 10K
R10
NI
OE1
SCLK
SDATA
U2
5 OE2
7 OE0
18 OE3
2 OE1
3 SSON
19 SCLK
20 SDA
Si52144
XOUT/DIFFIN 22
XIN/DIFFIN# 23
C1
0.1uF
C2
0.1uF
C3
0.1uF
C4
0.1uF
C5
0.1uF
DUTGND
1
6
12
17
21
VDD1
VDD6
VDD12
VDD17
VDD21
4
24
25
VSS4
VSS24
EPAD
DUTGND
DIFF0
DIFF0#
8
9
DIFF1
DIFF1#
10
11
DIFF2
DIFF2#
14
13
DIFF3
DIFF3#
16
15
DIFF0
DIFF0#
DIFF1
DIFF1#
DIFF2
DIFF2#
DIFF3
DIFF3#
R1
NI
R2
0
Y1
25MHz
R3
0
R4
NI
XOUT_DIFFIN
YC1
20pF
XTL P/N:
ECS-250-20-5PXDU-F-TR
Use SMD footprint
YC2 DUTGND
20pF
XIN_DIFFIN#
Figure 2. QFN-24 Device Connection
VDD_3.3V
JP1
JUMPER
L2
JP2
JUMPER
L3
JP3
JUMPER
L4
JP4
JUMPER
JP5
JUMPER
L5
L6
+ C8
C13
10uF
1uF
+ C9
C17
10uF 1uF
+ C10 C14
10uF 1uF
+ C11 C15
10uF 1uF
+ C12 C16
10uF 1uF
R5
0
DUTGND
R6
0
DUTGND
R7
0
DUTGND
R8
R9
0 DUTGND 0
DUTGND
VDD1
VDD21
VDD6
VDD12
VDD17
Figure 3. Device Power Supply
VDD_3.3V
+ C6
10uF
C7
0.1uF
GND1
1
L1
DUTGND
VDD_3V31
1
HEADER 1x1
HEADER 1x1
DUTGND
TP1 TP2 TP3 TP4 TP5
GND GND GND GND GND
DUTGND
4
Rev. 0.1