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SI52111-B5 Datasheet, PDF (4/20 Pages) Silicon Laboratories – PCI-EXPRESS GEN 3 SINGLE OUTPUT CLOCK GENERATOR
◁
Si52111-B5/B6
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Supply Voltage (extended)
Supply Voltage (commercial)
Symbol
VDD(extended)
VDD(commercial)
Test Condition
3.3 V ± 5%
3.3 V ± 10%
Min
Typ
Max Unit
3.13
3.3
3.46 V
2.97
3.3
3.63 V
Table 2. DC Electrical Specifications
Parameter
Operating Voltage
Operating Supply Current
Input Pin Capacitance
Output Pin Capacitance
Symbol
VDD
IDD
CIN
COUT
Test Condition
3.3 V ± 10%
Min
Typ
Max Unit
2.97
3.30
3.63 V
Full Active
—
—
13 mA
Input Pin Capacitance
—
3
5
pF
Output Pin Capacitance
—
—
5
pF
Table 3. AC Electrical Specifications
Parameter
Crystal
Long-term Accuracy
Clock Input
CLKIN Duty Cycle
CLKIN Rise and Fall Times
CLKIN Cycle-to-Cycle Jitter
CLKIN Long Term Jitter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
DIFF Clocks
Duty Cycle
Skew
Output Frequency
Frequency Accuracy
Slew Rate
Symbol
LACC
TDC
TR/TF
TCCJ
TLTJ
VIH
VIL
IIH
IIL
TDC
TSKEW
FOUT
FACC
tr/f2
Test Condition
Min
Measured at VDD/2 differential
—
Measured at VDD/2
45
Measured between 0.2 VDD and 0.5
0.8 VDD
Measured at VDD/2
—
Measured at VDD/2
—
XIN/CLKIN pin
2
XIN/CLKIN pin
—
XIN/CLKIN pin, VIN = VDD
—
XIN/CLKIN pin, 0 < VIN <0.8
–35
Measured at 0 V differential
45
Measured at 0 V differential
—
VDD = 3.3 V
—
All output clocks
—
Measured differentially from
0.6
±150 mV
Notes:
1. Visit www.pcisig.com for complete PCIe specifications.
2. Gen 4 specifications based on the PCI-Express Base Specification 4.0 rev. 0.5
3. Download the Silicon Labs PCIe Clock Jitter Tool at www.silabs.com/pcie-learningcenter.
Typ Max Unit
—
250 ppm
—
55
%
—
4.0 V/ns
—
250
ps
—
350
ps
— VDD+0.3 V
—
0.8
V
—
35
uA
—
—
uA
—
55
%
—
60
ps
100
—
MHz
—
100 ppm
—
4.0 V/ns
4
Rev 1.2
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