SI5347-46 Datasheet, PDF (3/13 Pages) Silicon Laboratories – Data Sheet Errata for Product Revision B

1. LVCMOS High-Impedance Mode is Too Low
Data Sheet Errata for Product Revision B
LVCMOS High-Impedance Mode is Too Low
Description
LVCMOS high-impedance is too low.
Impact without Workarounds
In earlier versions of ClockBuilder Pro (e.g., prior to v1.0), LVCMOS and differential output formats could be user-configured to disable
in a low logic state, a high logic state, or in a stop mid (high-impedance or Hi-Z) state. The LVCMOS high-impedance mode should not
be used.
Woraround
Select the disable state as stop-high or stop-low.
Resolution
This erratum will be fixed in the next silicon revision. ClockBuilder Pro (prior to v1.0) no longer allowed users to select the Hi-Z disable
state. The Si5347/46 Data Sheet, beginning with v0.95, also removes support for Hi-Z mode.
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