AN113 Datasheet, PDF (26/52 Pages) Silicon Laboratories – SERIAL COMMUNICATION WITH THE SMBUS

AN113
HIGH_ADD = ((byte_address >> 8) & 0x00FF);// Upper 8 address bits
LOW_ADD = (byte_address & 0x00FF);
// Lower 8 address bits
STO = 0;
STA = 1;
while (SM_BUSY);
return WORD;
}
// Start transfer
// Wait for transfer to finish
//------------------------------------------------------------------------------------
// Interrupt Service Routine
//------------------------------------------------------------------------------------
// SMBus interrupt service routine:
void SMBUS_ISR (void) interrupt 7
{
switch (SMB0STA){
// Status code for the SMBus (SMB0STA register)
// Master Transmitter/Receiver: START condition transmitted.
// The R/W bit of the COMMAND word sent after this state will
// always be a zero (W) because for both read and write,
// the memory address must be written first.
case SMB_START:
SMB0DAT = (COMMAND & 0xFE); // Load address of the slave to be accessed.
STA = 0;
// Manually clear START bit
break;
// Master Transmitter/Receiver: Repeated START condition transmitted.
// This state should only occur during a read, after the memory address has been
// sent and acknowledged.
case SMB_RP_START:
SMB0DAT = COMMAND;
// COMMAND should hold slave address + R.
STA = 0;
break;
// Master Transmitter: Slave address + WRITE transmitted. ACK received.
case SMB_MTADDACK:
SMB0DAT = HIGH_ADD;
// Load high byte of memory address
// to be written.
break;
// Master Transmitter: Slave address + WRITE transmitted. NACK received.
// The slave is not responding. Send a STOP followed by a START to try again.
case SMB_MTADDNACK:
STO = 1;
STA = 1;
break;
// Master Transmitter: Data byte transmitted. ACK received.
// This state is used in both READ and WRITE operations. Check BYTE_NUMBER
// for memory address status - if only HIGH_ADD has been sent, load LOW_ADD.
// If LOW_ADD has been sent, check COMMAND for R/W value to determine
// next state.
case SMB_MTDBACK:
switch (BYTE_NUMBER){
26
Rev. 1.3