EM351_12 Datasheet, PDF (219/244 Pages) Silicon Laboratories – High-Performance, Integrated ZigBee/802.15.4 System-on-Chip

EM351 / EM357
15 Flash Patch and Breakpoint (FPB)
The EM35x integrates the standard ARM^® Flash Patch and Breakpoint (FPB). The FPB implements hardware
breakpoints. The FPB also provides support for remapping of specific instruction or literal locations from flash
memory to an address in RAM memory. The FPB contains:
 Two literal comparators for matching against literal loads from flash space, and remapping to a
corresponding RAM space.
 Six instruction comparators for matching against instruction fetches from flash space, and remapping to a
corresponding RAM space. Alternatively, the comparators can be individually configured to return a
breakpoint instruction to the processor core on a match, implementing hardware breakpoint capability.
The FPB contains a global enable, but also individual enables for the eight comparators. If the comparison for
an entry matches, the address is remapped to the address defined in the remap register plus and offset
corresponding to the comparator that matched. Alternately, the address is remapped to a breakpoint
instruction. The comparison happens on the fly, but the result of the comparison occurs too late to stop the
original instruction fetch or literal load taking place from the flash space. The processor ignores this
transaction, however, and only the remapped transaction is used.
Memory Protection Unit (MPU) lookups are performed for the original address, not the remapped address.
Unaligned literal accesses are not remapped. The original access to the bus takes place in this case.
The FPB is designed for use with advanced debug tools, available from multiple vendors. Altering FPB
configuration may conflict with the operation of advanced debug tools.
For further information on the FPB, contact Silicon Labs support for the ARM^® Cortex^TM-M3 Technical
Reference Manual, the ARM^® CoreSight^TM Components Technical Reference Manual, the ARM^® v7-M
Architecture Reference Manual, and the ARM^® v7-M Architecture Application Level Reference Manual.
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Final
120-035X-000 Rev. 1.2