EM351_12 Datasheet, PDF (190/244 Pages) Silicon Laboratories – High-Performance, Integrated ZigBee/802.15.4 System-on-Chip

EM351 / EM357
Parameter
VREF load capacitance
External VREF voltage range
External VREF input impedance
Minimum input voltage
Maximum input voltage
Single-ended signal range
Differential signal range
Common mode range
Input referred ADC offset
Input Impedance
1 MHz sample clock
6 MHz sample clock
Not sampling
Min.
1.1
1
0
0
-VREF
0
-10
1
0.5
10
Typ.
1.2
Max.
10
1.3
VREF
VREF
+VREF
VREF
10
Units
nF
V
MΩ
V
V
V
V
V
mV
MΩ
Note: The signal-ended ADC measurements are limited in their range and only guaranteed for accuracy within
the limits shown in this table. The ADC's internal design allows for measurements outside of this range
(±200 mV), but the accuracy of such measurements is not guaranteed. The maximum input voltage is of more
interest to the differential sampling where a differential measurement might be small, but a common mode
can push the actual input voltage on one of the signals towards the upper voltage limit.
10-12
Final
120-035X-000 Rev. 1.2