SI5040-EVB Datasheet, PDF (2/24 Pages) Silicon Laboratories – Four selectable on-chip reference frequencies

Si5040-EVB
7. The device should now be functioning with the
CMUs in referenceless mode. That is, the RX and
TX CMUs clean up the recovered clock from the
CDR without the aid of any external reference clock
or crystal. In addition, the device will automatically
detect an external reference clock for CDR
acquisition. If an external reference clock is not
provided, the CDR acquisition will be in reference-
less mode as well.
8. If Mode 3 (the extreme jitter cleaning mode) is
desired, open System Programmer and click on the
TX CDR/CMU Control link in the Block Diagram.
Then, choose "Mode 3" from the "cmuMode" pull-
down manual.
9. Next, open System Programmer. Under System
Programmer, there is a block diagram of the device,
and under the "Alarms and Interrupts" tab, are all the
alarms you need for the evaluation. Note that under
the "Alarms and Interrupts" tab, the tpSync alarms
should be labeled as "tpSyncLos". When the
"tpSyncLos" LED is green, the test pattern checker is
in the Synchronized state (tpSyncLos= 0 in Register
9 or 137, Bit 1). When the "tpSyncLos" LED is red,
the test pattern checker is in the Loss of
Synchronization state (tpSyncLos= 1 in Register 9 or
137, Bit 1).
2
Rev. 0.4