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| SI87XX Datasheet, PDF (15/36 Pages) Silicon Laboratories – 5 KV LED EMULATOR INPUT, OPEN COLLECTOR OUTPUT ISOLATORS | |||
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Si87xx
New designs should consider the input circuit configurations of Figure 9, which are more efficient than those of
Figures 7 and 8. As shown, S1 and S2 represent any suitable switch, such as a BJT or MOSFET, analog
transmission gate, processor I/O, etc. Also, note that the Si87xx input can be driven from the I/O port of any MCU
or FPGA capable of sourcing a minimum of 6 mA (see Figure 9B). Additionally, note that the Si87xx propagation
delay and output drive do not significantly change for values of IF between IF(MIN) and IF(MAX).
+5V
S1
Control
Input
R1
S2
Si87xx
1 N/C
2 ANODE
3 CATHODE
Si87xx
1 N/C
MCU I/O
Port pin
2 ANODE
R1
3 CATHODE
4 N/C
4 N/C
A
B
Figure 9. Si87xx Other Input Circuit Configurations
4.2. Output Circuit Design and Power Supply Connections
The speed of the open collector circuit is dependent upon the supply, VCC, the pullup resistor, RL, and the load
modeled by CL. Figure 10 illustrates three common circuit output configurations. For VDD = 5 V operation,
RL>350 ïï is recommended to ensure proper VOL levels. For VDD = 30 V operation, RL > 2.1 kïï is recommended
to ensure proper VOL levels. If the enable pin is used (see Figure 10B) and two separate supplies power VDD and
the VO pullup resistor, the enable pin should be referenced to the VDD pin because VO cannot exceed VDD by more
than 0.5 V. Figure 10C illustrates a circuit using the internal 20 kï resistor.
Note that GND can be biased at, above, or below ground as long as the voltage on VDD with respect to GND is a
maximum of 30 V. VDD decoupling capacitors should be placed as close to the package pins as possible. The
optimum values for these capacitors depend on load current and the distance between the chip and its power
source. It is recommended that 0.1 and 1 µF bypass capacitors be used to reduce high-frequency noise and
maximize performance. Opto replacement applications should limit their supply voltages to 30 V or less.
Si87xx
VCC 3-30 V
VDD 8
Si87xx
VCC1 3-30 V
VDD 8
VCC2 3-30 V
Si87xx
VCC 3-30 V
VDD 8
VE 7 EN
RL
VO 6
CL
GND 5
0.1, 1 µF
VE 7 EN
RL
0.1, 1 µF
VO 6
CL
GND 5
VL 7
VO 6
GND 5
A
B
C
Figure 10. Si87xx Output Circuit Configurations
RL
0.1, 1 µF
CL
Preliminary Rev. 0.5
15
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