SI57X-EVB Datasheet, PDF (11/34 Pages) Silicon Laboratories – Si57X/598/599 ANY FREQUENCY I2C PROGRAMMABLE XO/VCXO EVALUATION BOARD

Si57x-EVB
2. Clock I/O
There are no input clock signals that are routed to and from the DUT via the motherboard. The Si57x
daughterboard output clocks are directly routed from the Si57x daughterboard to SMA connectors J4 and J5.
These connectors are designated CLKP and CLKN, respectively. Each of these output clocks needs to be
terminated into 50  single-ended, 100  differential. Any ac coupling caps or near end LVPECL bias resistors
have to be provided for on the Si57x daughterboard.
3. Configuring the Si57x-EVB
PC
+5 V(POopwtioenr _{aSl)upply- +}
USB
-+
Si57x-EVB
MB
Optional Voltage Source
(for Si571/599)
DB
VC_MOD
Frequency Counter
CLKN
Optional Oscilloscope
or other Instrument
Figure 5. Typical Configuration
CLKN
CLKP
Rev. 0.2
11