SI5013-EVB Datasheet, PDF (1/11 Pages) Silicon Laboratories – Differential I/Os ac coupled

Si5013-EVB
EVALUATION BOARD FOR Si5013 SiPHY™ MULTI-RATE
SONET/SDH CLOCK AND DATA RECOVERY IC
Description
Features
The Si5013 evaluation board provides a platform for
testing and characterizing Silicon Laboratories’ Si5013
SiPHY™ multi-rate SONET/SDH clock and data
recovery IC. The Si5013 CDR supports OC-12/3,
STM 4/1 data rates.
All high-speed I/Os are ac coupled to ease interfacing to
industry standard test equipment.
 Single 3.3 V power supply
 Differential I/Os ac coupled
 Simple jumper configuration
Function Block Diagram
Pulse
Generator
Pattern
Generator
VDD
210 
Z_C = 50 
Z_C = 50 
348
Z_C = 50 
Z_C = 50 
Jumpers
+
REFCLK
–
+
CLKOUT
–
Si5013
+
DATAIN
–
+
DATAOUT
–
LOS
RATESEL
LTR
DSQLCH
LOL
BER_ALM
RESET/CAL
CLKDSBL
Z_C = 50 
Z_C = 50 
Z_C = 50 
Z_C = 50 
Jitter
Analyzer
Scope
Pattern
Analyzer
Test Points
LOS_LVL
SLICE_LVL
REXT
BER_LVL
Si5013-EVB
10 k
Rev. 1.0 12/02
Copyright © 2002 by Silicon Laboratories
Si5013-EVB-DS10