S-93A46BD0A-J8T2U3 Datasheet, PDF (9/39 Pages) Seiko Instruments Inc – Function to protect against write due to erroneous instruction recognition

Rev.1.2_00
FOR AUTOMOTIVE 125°C OPERATION 3-WIRE SERIAL E²PROM
S-93A46B/56B/66B/76B/86B
 AC Electrical Characteristics
Table 9 Measurement Conditions
Input pulse voltage
Output reference voltage
Output load
0.1 × V_CC to 0.9 × V_CC
0.5 × V_CC
100 pF
Table 10
Ta = −40°C to +125°C
Item
Symbol
V_CC = 2.5 V to 5.5 V
V_CC = 4.5 V to 5.5 V Unit
Min.
Max.
Min.
Max.
CS pin setup time
t_CSS
0.15
−
0.15
−
μs
CS pin hold time
t_CSH
0
−
0
−
μs
CS pin deselect time
t_CDS
0.2
−
0.2
−
μs
Data setup time
t_DS
0.1
−
0.1
−
μs
Data hold time
t_DH
0.1
−
0.1
−
μs
Output delay time
Clock frequency^*1
t_PD
−
0.25
−
0.25
μs
f_SK
0
2.0
0
2.0
MHz
Clock pulse width
t_SKH, t_SKL
0.2
−
0.1
−
μs
Output disable time
t_HZ1, t_HZ2
0
0.2
0
0.15
μs
Output enable time
t_SV
0
0.2
0
0.15
μs
Write time
t_PR
−
4.0
−
4.0
ms
*1. The clock cycle of the SK clock (frequency f_SK) is 1/f_SK μs. This clock cycle is determined by a combination of
several AC characteristics. Note that the clock cycle cannot be set as (1/f_SK) = t_SKL (min.) + t_SKH (min.) by minimizing
the SK clock cycle time.
t CSS
1/f_SK^*2
t CDS
CS
t SKH
t SKL
t CSH
SK
t DS
t DH
tDS tDH
DI
High-Z^*1
DO
(READ)
t SV
High-Z
DO
(VERIFY)
Valid data
t PD
t HZ2
Valid data
t PD
High-Z
t HZ1
High-Z
*1. Indicates high impedance.
*2. 1/f_SK is the SK clock cycle. This clock cycle is determined by a combination of several AC characteristics.
Note that the clock cycle cannot be set as (1/f_SK) = t_SKL (min.) + t_SKH (min.) by minimizing the SK clock cycle
time.
Figure 1 Timing Chart
9