S-93A46BD0A-J8T2U3 Datasheet, PDF (22/39 Pages) Seiko Instruments Inc – Function to protect against write due to erroneous instruction recognition

FOR AUTOMOTIVE 125°C OPERATION 3-WIRE SERIAL E²PROM
S-93A46B/56B/66B/76B/86B
Rev.1.2_00
 Function to Protect Against Write due to Erroneous Instruction Recognition
This IC provides a built-in clock pulse monitoring circuit which is used to prevent an erroneous write operation by
canceling write instructions (WRITE, ERASE, WRAL, and ERAL) recognized erroneously due to an erroneous clock
count caused by the application of noise pulses or double counting of clocks. Instructions are cancelled if a clock pulse
whose count other than the one specified for each write instruction (WRITE, ERASE, WRAL, or ERAL) is detected.
Example: Erroneous Recognition of EWDS as ERASE
Example of S-93A76B/86B
Noise pulse
CS
1 2 3 4 5 6 7 8 9 10 11 12 13
SK
DI
Input EWDS instruction
1000000000000
Erroneous recognition as ERASE 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
instruction due to noise pulse
In products that do not incorporate a clock pulse monitoring circuit, "FFFF" is mistakenly written to address
00h. However the S-93A76B/86B detects the overcount and cancels the instruction without performing a write
operation.
Figure 21 Example of Clock Pulse Monitoring Circuit Operation
22